HCC4536B Datasheet, PDF (12/17 Pages) STMicroelectronics – PROGRAMMABLE TIMER

HCC/HCF4536B
Inputs
I n1 Set Reset 8-Bypass
1
0
1
1
1
1
1
1
0
1
1
1
1
0
1
1
1
–
–
0
1
1
1
0
0
0
0
1
0
0
0
0
0
0
0
Functional Test Sequence
Outputs
Commen ts
Decade Out
Q 1 Thru Q 24
All 2 4 steps a r e in reset mode.
0
0
Counter is in three 8-stage section in parallel
mode.
0
First ”1” to ”0” Transition of Clock
255 ”1” to ”0” transitions are clocked in the
counter.
1
The 255 ”1” to ”0” Transition
Counter converted back to 24 stages in series
1
mode.
Set and Reset must be connected together and
simultaneoulsy go from ”1” to ”0”.
1
In ₁ switches to a ”1”.
0
Counter Ripples from an all ”1” state to an all ”0”
state.
FUNCTIONAL TEST SEQUENCE
Test Function has been included for the reduction of
test time required to exercise all 24 counter stages.
This test function divides the counter into three 8-
stage section and 255 counts are loaded in each of
the 8-stage sections in parallel. All flip-flops are now
TEST CIRCUITS
Quiescent Device Current.
at a ”1”. The counter is now returned to the normal
24-steps in series configuration. One more pulse is
entered into In₁ which will cause the counter to ripple
from an all ”1” state to an all ”0” state.
Input Voltage.
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