STM32F407ZET6 Datasheet, PDF (114/167 Pages) STMicroelectronics – ARM Cortex-M4 32b MCU+FPU, 210DMIPS, up to 1MB Flash/192+4KB RAM

Electrical characteristics
STM32F405xx, STM32F407xx
Figure 42. USB OTG FS timings: definition of data signal rise and fall time
Differen tial
data lines
VCR _S
Crossover
points
VS _S
tf
tr
ai14137
Table 56.
USB OTG FS electrical characteristics⁽¹⁾
Driver characteristics
Symbol
Parameter
Conditions
Min
Max
Unit
t_r
Rise time⁽²⁾
t_f
Fall time⁽²⁾
C_L = 50 pF
4
C_L = 50 pF
4
20
ns
20
ns
t_rfm Rise/ fall time matching
t_r/t_f
90
110
%
V_CRS Output signal crossover voltage
1.3
2.0
V
1. Guaranteed by design, not tested in production.
2. Measured from 10% to 90% of the data signal. For more detailed informations, please refer to USB
Specification - Chapter 7 (version 2.0).
Table 57. USB FS clock timing parameters⁽¹⁾⁽²⁾
Parameter
Symbol
f_HCLK value to guarantee proper operation of
USB FS interface
-
Frequency (first transition)
8-bit ±10% F_{START_8BIT}
Frequency (steady state) ±500 ppm
F_STEADY
Duty cycle (first transition)
8-bit ±10% D_{START_8BIT}
Duty cycle (steady state) ±500 ppm
D_STEADY
Time to reach the steady state frequency and
duty cycle after the first transition
T_STEADY
Clock startup time after the
de-assertion of SuspendM
Peripheral
Host
T_{START_DEV}
T_{START_HOST}
PHY preparation time after the first transition
of the input clock
T_PREP
1. Guaranteed by design, not tested in production.
2. TBD stands for “to be defined”.
Min Nominal Max Unit
14.2
TBD
TBD
TBD
TBD
-
-
-
-
TBD
TBD
TBD
TBD
-
-
-
-
MHz
TBD
TBD
TBD
TBD
MHz
MHz
%
%
TBD ms
TBD
ms
-
-
µs
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Doc ID 022152 Rev 2