M29W008T Datasheet, PDF (11/30 Pages) STMicroelectronics – 8 Mbit 1Mb x8, Boot Block Low Voltage Single Supply Flash Memory

M29W008T, M29W008B
Table 8. Instructions ⁽¹⁾
Mne.
Instr. Cyc.
1st Cyc. 2nd Cyc. 3rd Cyc. 4th Cyc. 5th Cyc. 6th Cyc. 7th Cyc.
Addr. ^(3,7)
X
Read/Reset ¹⁺
Read Memory Array until a new write cycle is initiated.
RD ^(2,4) Memory
Data
F0h
Array
Addr. ^(3,7) 5555h
3+
Data
AAh
2AAAh
55h
5555h _{Read Memory Array until a new write cycle}
is initiated.
F0h
AS ⁽⁴⁾ Auto Select
Addr. ^(3,7) 5555h
3+
Data
AAh
2AAAh
55h
5555h Read Electronic Signature or Block
Protection Status until a new write cycle is
90h ^{initiated. See Note 5 and 6.}
PG Program
Addr. ^(3,7) 5555h
4
Data
AAh
2AAAh
55h
5555h
A0h
Program
Address
Program
Data
Read Data Polling or Toggle Bit
until Program completes.
6 Addr. ^(3,7) 5555h
BE Block Erase
2AAAh
5555h
5555h
2AAAh
Block Additional
Address Block ⁽⁸⁾
Data
AAh
55h
80h
AAh
55h
30h
30h
Chip Erase
CE
6 Addr. ^(3,7) 5555h
Data
AAh
2AAAh
55h
5555h
80h
5555h
AAh
2AAAh
55h
5555h
10h
Note 9
ES ⁽¹⁰⁾
Erase
Suspend
Addr. ^(3,7)
1
X
Read until Toggle stops, then read all the data needed from any
Block(s) not being erased then Resume Erase.
Data
B0h
ER
Erase
Resume
Addr. ^(3,7)
1
X
Read Data Polling or Toggle Bits until Erase completes or Erase
is suspended another time
Data
30h
Notes: 1. Commands not interpreted in this table will default to read array mode.
2. A wait of tPLYH is necessary after a Read/Reset command if the memory was in an Erase or Program mode
before starting any new operation. (See Table 14 and Figure 9).
3. X = Don’t Care.
4. The first cycles of the RD or AS instructions are followed by read operations. Any number of read cycles can occur after
the command cycles.
5. Signature Address bits A0, A1 at VIL will output Manufacturer code (20h). Address bits A0 at VIH and A1 at VIL will output
Device code.
6. Block Protection Address: A0 at VIL, A1 at VIH and A13-A19 within the Block will output the Block Protection status.
7. For Coded cycles address inputs A15-A19 are don’t care.
8. Optional, additional Blocks addresses must be entered within the erase timeout delay after last write entry, timeout status
can be verified through DQ3 value (see Erase Timer Bit DQ3 description). When full command is entered,
read Data Polling or Toggle bit until Erase is completed or suspended.
9. Read Data Polling, Toggle bits or RB until Erase completes.
10.During Erase Suspend, Read and Data Program functions are allowed in blocks not being erased.
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