STM32F103ZEH7 Datasheet, PDF (109/130 Pages) STMicroelectronics – High-density performance line ARM-based 32-bit MCU with 256 to 512KB Flash, USB, CAN, 11 timers, 3 ADCs, 13 communication interfaces

STM32F103xC, STM32F103xD, STM32F103xE
Electrical characteristics
Table 63. DAC characteristics (continued)
Symbol
Parameter
Min Typ
Max
Offset error
±10
(difference between
Offset⁽²⁾ measured value at Code
±3
(0x800) and the ideal value =
V_REF+/2)
±12
Gain
error⁽²⁾
Gain error
±0.5
Settling time (full scale: for a
10-bit input code transition
t_SETTLING(2)
between the lowest and the
highest input codes when
DAC_OUT reaches final
value ±1LSB
3
4
Max frequency for a correct
Update
rate⁽²⁾
DAC_OUT change when
small variation in the input
1
code (from code i to i+1LSB)
Wakeup time from off state
t_WAKEUP(2) (Setting the ENx bit in the
DAC Control register)
6.5 10
Power supply rejection ratio
PSRR+ ⁽¹⁾ (to V_DDA) (static DC
measurement
–67 –40
1. Guaranteed by design, not tested in production.
2. Guaranteed by characterization, not tested in production.
Unit
Comments
mV
Given for the DAC in 12-bit
configuration
LSB
Given for the DAC in 10-bit at V_REF+
= 3.6 V
LSB
Given for the DAC in 12-bit at V_REF+
= 3.6 V
%
Given for the DAC in 12bit
configuration
µs C_LOAD ≤ 50 pF, R_LOAD ≥ 5 kΩ
MS/s C_LOAD ≤ 50 pF, R_LOAD ≥ 5 kΩ
C_LOAD ≤ 50 pF, R_LOAD ≥ 5 kΩ
µs input code between lowest and
highest possible ones.
dB No R_LOAD, C_LOAD = 50 pF
Figure 61. 12-bit buffered /non-buffered DAC
Buffered/Non-buffered DAC
Buffer(1)
12-bit
digital to
analog
converter
DACx_OUT
R _LOAD
C _LOAD
ai17157
1. The DAC integrates an output buffer that can be used to reduce the output impedance and to drive external loads directly
without the use of an external operational amplifier. The buffer can be bypassed by configuring the BOFFx bit in the
DAC_CR register.
Doc ID 14611 Rev 8
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