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STEF05 Datasheet, PDF (10/20 Pages) STMicroelectronics – Electronic fuse for 5 V line
Typical application
STEF05
The addition of an external Cdv/dt also influences the initial delay time, defined as the time
between the Enable signal going high and the start of the VOUT slope (Figure 5).
The contribution of the external capacitor to this time interval can be estimated by using the
following theoretical formula:
Equation 3
delay time = 500 × 10–6 + 13.6 × 106 × Cdvdt
Figure 5. Delay time and VOUT ramp-up time
6
5
4
delay ramp-up
time
time
3
2
1
0
Time
AM09870v1
VOUT
EN/Fault
5.4
Enable/Fault pin
The Enable/Fault pin has the dual function of controlling the output of the device and, at the
same time, of providing information about the device status to the application.
When it is used as a standard Enable pin, it should be connected to an external open-drain
or open-collector device. In this case, when it is pulled at low logic level, it turns the output of
the E-Fuse off.
If this pin is left floating, since it has internal pull-up circuitry, the output of the E-Fuse is kept
ON in normal operating conditions.
In case of thermal fault, the pin is pulled to an intermediate state (Figure 6). This signal can
be provided to a monitor circuit, informing it that a thermal shutdown has occurred, or it can
be directly connected to the Enable/Fault pins of other STEFxx devices on the same
application in order to achieve a simultaneous enable/disable feature.
When a thermal fault occurs, the device can be reset either by cycling the supply voltage or
by pulling down the Enable pin below the Vil threshold and then releasing it.
10/20
Doc ID 019055 Rev 4