STV3550 Datasheet, PDF (1/144 Pages) STMicroelectronics – LCD and Matrix Display TV Processor

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STV3550
LCD and Matrix Display TV Processor
YCRCB[7:0]
CLK_DATA
HSYNC
VSYNC
STV3550
Standard Definition
Input (SDIN)
H/V Filter
Temporal Noise Reduction
Film Mode Detection
Video
Display
Pipeline
PSI/CTI
DATASHEET
Picture
Compositor
Cursor Plane
Background Plane
Digital
Video
Output
Gamma Correction
Perfect Color
Engine
4 to 10-bit
RGB Digital
Video
Outputs
27 MHz
CLKXTP
CLKXTM
Reset
Clock
Generator
ST20 32-bit CPU Core
100 MHz, 8 kB SRAM
4 kB I-Cache 4 kB D-Cache
Diagnostic Controller
Interrupt Controller
Main Features
■ Fully-programmable Digital Video Output Stage for direct
RGB interface to Flat Display Panel with 4- to 10-bit color
resolution and pixel resolution from VGA to WXGA including
HDTV2.
■ Versatile Integrated Up-Converter
● 50/60-Hz Progressive output with Line-Interpolation
(A + A*), Field-Merging (A + B) or with Motion-adaptive
De-interlacing based on median f(A, B)
● Advanced Still Picture modes: AA*AA* and ABAB
interlaced or AAAA non-interlaced
● Automatic Movie mode detection and scanning
■ Standard Definition Input
● ITU-R BT.656/601 Video Input
● Separate H/V inputs synchronous with input clock
● 3D Temporal Noise Reduction with Comet-effect
Correction
● Movie Mode Detection with Motion Phase Recovery
● Scene-change Detector for Contrast Enhancer and Up-
conversion Control
● Letterbox Format Detection and Auto-Format Correction
■ High-Quality Video Display
● Picture Structure Improvement including Color Transition
Improvement, Luma Peaking/Coring and Luma Contrast
Enhancer
● H/V format conversion with Zoom In/Out (4x to 1/8x) with
H/V decimation
● Letterbox and 4:3 to 16:9 format conversion with
programmable 5-segment Panoramic mode
● Very flexible Sync Generator for Master and Slave
modes by Vsync and Hsync signals generation
● Progressive Display mode (60 Hz, 50 Hz) for full-screen
graphic planes
● Mosaic mode with up to 16 pictures displayed
TV Peripherals
RTC, ADC, I²C Bus,
I/O Ports, 4 Timers,
UART, WDT, PWM
and Infrared Digital
Preprocessor
External
Memory
Interface
Flash
SDRAM
DCLK
DE
H100
V100
Output
Clock
■ Picture Compositor to provide Transparency mode between
Video and Graphic planes
■ High-Performance 8-bit Bitmap OSD Generator
● Pixel-based resolution with 10-bit RGB outputs
● Programmable Resolution up to WXGA, all standard
displays are supported:
− Teletext 1.5 (480x520) and 2.5 (672x520)
− Double-page Teletext (960x520) with Picture-and-Text
− TeleWeb (640x480)
● 4 graphic planes with full alpha-blending capabilities:
− 24-bit Background Plane
− 10-bit RGB Video Plane
− Bitmap OSD Plane with Color Map
− Up to 128 x 128 pixel Cursor Plane
● 2D Graphics Accelerator
■ Embedded 32-bit ST20 CPU Core
■ Peripherals and I/Os for TV Chassis Control:
● 30 fully-programmable I/Os (5V tolerant)
● 4 external interrupts
● 8-bit programmable PWM with 4 inputs/outputs
● Infrared Digital Preprocessor
● Real Time Clock and Watchdog Timer
● 4 16-bit standard timers
● 10-bit ADC with 6 inputs and wake-up capability
● 2 Master/Slave I²C Bus Interfaces
● UART and support for IrDA interfaces
■ Teletext 1.5 and 2.5, Closed-Caption, VPS and
WSS VBI Data Decoding, TeleWeb Compliant
■ Embedded Emulation Resources with In-Situ
Flash Programming Capabilities
■ 1.8V and 3.3V Power supplies
■ Eco Standby mode
■ 27-MHz Crystal Oscillator
■ PC input compatible
February 2004
Revision 1.3
DMS No. 03688M
This is preliminary information on a new product now in development. Details are subject to change without notice.
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