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STM8S103XX Datasheet, PDF (1/56 Pages) STMicroelectronics – Access line, STM8S 8-bit MCU, up to 32 Kbytes Flash, 10-bit ADC, timers, USART, SPI, I²C
STM8S103xx
STM8S105xx
Access line, STM8S 8-bit MCU, up to 32 Kbytes Flash,
10-bit ADC, timers, USART, SPI, I²C
Preliminary Data
Features
Core
■ Max fCPU: up to 16 MHz
■ Advanced STM8 core with Harvard
architecture and 3-stage pipeline
■ Extended instruction set
Memories
■ Program memory: Up to 32 Kbytes Flash; data
retention 20 years at 85°C after 1 kcycles
■ RAM: Up to 2 Kbytes
Clock, reset and supply management
■ 3.0 to 5.5 V operating voltage
■ Flexible clock control, 4 master clock sources:
– Low power crystal resonator oscillator
– External clock input
– Internal 16 MHz RC
– Internal low power 128 kHz RC
■ Clock security system with clock monitor
■ Power management:
– Low power modes (Wait, Active-halt, Halt)
– Switch-off peripheral clocks individually
■ Permanently active, low consumption power-
on and power-down reset
Interrupt management
■ Nested interrupt controller with 32 interrupts
■ Up to 37 external interrupts on 6 vectors
Timers
■ 2x 16-bit general purpose timers, with 2+3
CAPCOM channels (IC, OC or PWM)
■ Advanced control timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-time
insertion and flexible synchronization
■ 8-bit basic timer with 8-bit prescaler
■ Auto wake-up timer
■ 2 watchdog timers: Window watchdog and
independent watchdog
LQFP48 7x7
LQFP44 10x10
LQFP32 7x7
TSSOP20
VFQFN32 5x5
Communications interfaces
■ USART or LINUART with clock output for
synchronous operation, smartcard mode, IrDA
mode, LIN master mode
■ SPI synchronous serial interface up to 8 Mbit/s
■ I2C interface up to 400 Kbit/s
Analog to digital converter (ADC)
■ 10-bit, ±1 LSB ADC with up to 10 multiplexed
channels, scan mode and analog watchdog
I/Os
■ Up to 38 I/Os on a 48-pin package including 9
high sink outputs
■ Highly robust I/O design, immune against
current injection
Table 1. Device summary
Reference
Root part number
STM8S103xx
STM8S105xx
STM8S103K3
STM8S105C6, STM8S105C4,
STM8S105K6, STM8S105K4,
STM8S105S6, STM8S105S4,
June 2008
Rev 2
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
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