STM8AF61XX Datasheet, PDF (1/100 Pages) STMicroelectronics – Automotive 8-bit MCU, with up to 128 Kbytes Flash, EEPROM, 10-bit ADC, timers, LIN, CAN, USART, SPI, I2C, 3 V to 5.5 V

STM8AF61xx, STM8H61xx
STM8AF51xx, STM8AH51xx
Automotive 8-bit MCU, with up to 128 Kbytes Flash, EEPROM,
10-bit ADC, timers, LIN, CAN, USART, SPI, I²C, 3 V to 5.5 V
Features
Core
■ Max f_CPU: 24 MHz
■ Advanced STM8A core with Harvard
architecture and 3-stage pipeline
■ Average 1.6 cycles/instruction resulting in 10
MIPS at 16 MHz f_CPU for industry standard
benchmark
Memories
■ Program memory: 48 to 128 Kbytes Flash; data
retention 20 years at 55 °C after 1 kcycle
■ Data memory: 1.5 to 2 Kbytes true data
EEPROM; endurance 300 kcycles
■ RAM: 3 to 6 Kbytes
Clock management
■ Low power crystal resonator oscillator with
external clock input
■ Internal, user-trimmable 16 MHz RC and low
power 128 kHz RC oscillators
■ Clock security system with clock monitor
Reset and supply management
■ Multiple low power modes (wait, slow, auto
wake-up, halt) with user definable clock gating
■ Low consumption power-on and power-down
reset
Interrupt management
■ Nested interrupt controller with 32 interrupt
vectors
■ Up to 37 external interrupts on 5 vectors
Timers
■ Up to 2 auto-reload 16-bit PWM timers with up
to 3 CAPCOM channels each (IC, OC or PWM)
■ Multipurpose timer: 16-bit, 4 CAPCOM
channels, 3 complementary outputs, dead-time
insertion and flexible synchronization
■ 8-bit AR system timer with 8-bit prescaler
■ Auto wake-up timer
■ 2 watchdog timers: Window and standard
LQFP48 7x7
LQFP80 14x14
LQFP64 10x10
LQFP32 7x7
Communication interfaces
■ High speed 1 Mbit/s active CAN 2.0B interface
■ USART with clock output for synchronous
operation - LIN master mode
■ LINUART LIN 2.1 compliant, master/slave
modes with automatic resynchronization
■ SPI interface up to 10 Mbit/s or (f_CPU/2)
■ I²C interface up to 400 Kbit/s
Analog to digital converter (ADC)
■ 10-bit, 3 LSB ADC with up to 16 multiplexed
channels
I/Os
■ Up to 70 user pins including 10 high sink I/Os
■ Highly robust I/O design, immune against
current injection
Table 1. Device summary⁽¹⁾
STM8AF61xx/STM8AH61xx (without CAN)
STM8AF/H61AA, STM8AF/H619A, STM8AF/H61A9,
STM8AF/H6199, STM8AF/H6189, STM8AF/H6179,
STM8AF/H6169, STM8AF/H61A8, STM8AF/H6198,
STM8AF/H6188, STM8AF/H6178, STM8AF/H6186,
STM8AF/H6176
STM8AF51xx/STM8AH51xx (with CAN)
STM8AF/H51AA, STM8AF/H519A, STM8AF/H51A9,
STM8AF/H5199, STM8AF/H5189, STM8AF/H5179,
STM8AF/H5169, STM8AF/H51A8, STM8AF/H5198,
STM8AF/H5188, STM8AF/H5178
1. This datasheet applies to product versions with and
without data EEPROM. The order code identifier is ‘F’
or ‘H’ respectively, only one of which appears in an
order code.
August 2008
Rev 2
1/100
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