STM32L100RC Datasheet, PDF (1/104 Pages) STMicroelectronics – Reset and supply management

STM32L100RC
Ultra-low-power 32b MCU ARM^®-based Cortex^®-M3, 256KB Flash,
16KB SRAM, 4KB EEPROM, LCD, USB, ADC, DAC, memory I/F
Datasheet −production data
Features
• Ultra-low-power platform
– 1.65 V to 3.6 V power supply
– -40 °C to 105 °C temperature range
– 0.29 µA Standby mode (3 wakeup pins)
– 1.15 µA Standby mode + RTC
– 0.44 µA Stop mode (16 wakeup lines)
– 1.4 µA Stop mode + RTC
– 8.6 µA Low-power run mode
– 185 µA/MHz Run mode
– 10 nA ultra-low I/O leakage
– 8 µs wakeup time
• Core: ARM^® Cortex^®-M3 32-bit CPU
– From 32 kHz up to 32 MHz max
– 1.25 DMIPS/MHz (Dhrystone 2.1)
– Memory protection unit
• Reset and supply management
– Low-power, ultrasafe BOR (brownout reset)
with 5 selectable thresholds
– Ultra-low-power POR/PDR
– Programmable voltage detector (PVD)
• Clock sources
– 1 to 24 MHz crystal oscillator
– 32 kHz oscillator for RTC with calibration
– High Speed Internal 16 MHz
– Internal low-power 37 kHz RC
– Internal multispeed low-power 65 kHz to
4.2 MHz
– PLL for CPU clock and USB (48 MHz)
• Pre-programmed bootloader
– USB and USART supported
• Development support
– Serial wire debug supported
– JTAG supported
• 51 fast I/Os (42 I/Os 5V tolerant), all mappable
on 16 external interrupt vectors
LQFP64 (10 × 10 mm)
• Memories
– 256 KB Flash memory with ECC
– 16 KB RAM
– 4 KB of true EEPROM with ECC
– 20 Byte backup register
• LCD Driver for up to 8x28 segments
• Analog peripherals
– 12-bit ADC 1Msps up to 20 channels
– 12-bit DACs 2 channels with output buffers
– 2x ultra-low-power-comparators
(window mode and wakeup capability)
• DMA controller 12x channels
• 9x peripheral communication interfaces
– 1xUSB 2.0 (internal 48 MHz PLL)
– 3xUSART
– 3xSPI 16 Mbits/s (2x SPI with I2S)
– 2xI2C (SMBus/PMBus)
• 10x timers: 6x 16-bit with up to 4 IC/OC/PWM
channels, 2x 16-bit basic timers, 2x watchdog
timers (independent and window)
• CRC calculation unit
March 2015
This is information on a product in full production.
DocID024995 Rev 4
1/104
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