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STLVD111_07 Datasheet, PDF (1/19 Pages) STMicroelectronics – Programmable low voltage 1:10 differential LVDS clock driver
STLVD111
Programmable low voltage
1:10 differential LVDS clock driver
Features
■ 100ps part-to part skew
■ 50ps bank skew
■ Differential design
■ Meets LVDS spec. for driver outputs and
receiver inputs
■ Reference voltage available output VBB
■ Low voltage VCC range of 2.375V to 2.625V
■ High signalling rate capability (exceeds
622MHz)
■ Support open, short and terminated input fail-
safe (low output state)
■ Programmable drivers power off control
Description
The STLVD111 is a low skew programmable 1 to
10 differential LVDS driver, designed for clock
distribution. The select signal is fanned out to 10
identical differential outputs.
The STLVD111 is provided with a 11 bit shift
register with a serial in and a Control Register.
The purpose is to enable or power off each output
clock channel and to select the clock input. The
TQFP32
STLVD111 is specifically designed, modelled and
produced with low skew as the key goal. Optimal
design and layout serve to minimize gate to gate
skew within a device. The net result is a
dependable guaranteed low skew device.
The STLVD111 can be used for high performance
clock distribution in 2.5V systems with LVDS
levels. Designers can take advantage of the
device’s performance to distribute low skew
clocks across the backplane or the board.
Order codes
Part number
STLVD111BFR
May 2007
Temperature
range
-40 to 85 °C
Package
TQFP32 (Tape & Reel)
Rev. 8
Packaging
2400 parts per reel
1/19
www.st.com
19