STL20DN10F7 Datasheet, PDF (1/14 Pages) STMicroelectronics – N-channel enhancement mode

STL20DN10F7
Dual N-channel 100 V, 0.059 Ω typ., 5 A STripFET™ VII DeepGATE™
Power MOSFET in a PowerFLAT™ 5x6 double island package
Datasheet - production data
1
4
1
4
8
5
PowerFLAT™ 5x6
double island
Figure 1. Internal schematic diagram
Features
Order code
V_DS R_DS(on) max
I_D
STL20DN10F7 100 V 0.067 Ω
5A
• N-channel enhancement mode
• Lower R_DS(on) x area vs previous generation
• 100% avalanche rated
Applications
• Switching applications
Description
th
This device utilizes the 7 generation of design
rules of ST’s proprietary STripFET™ technology,
with a new gate structure. The resulting Power
MOSFET exhibits the lowest R_DS(on) in all
packages.
Order code
STL20DN10F7
Table 1. Device summary
Marking
Package
20DN10F7
PowerFLAT™ 5x6 double island
Packaging
Tape and reel
April 2014
This is information on a product in full production.
DocID023935 Rev 3
1/14
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