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STD7NS20 Datasheet, PDF (1/8 Pages) STMicroelectronics – N-CHANNEL 200V - 0.35ohm - 7A DPAK / IPAK MESH OVERLAY™ MOSFET
STD7NS20
STD7NS20-1
N-CHANNEL 200V - 0.35Ω - 7A DPAK / IPAK
MESH OVERLAY™ MOSFET
PRELIMINARY DATA
TYPE
VDSS
RDS(on)
ID
STD7NS20
STD7NS20-1
200 V < 0.40 Ω
7A
200 V < 0.40 Ω
7A
s TYPICAL RDS(on) = 0.35 Ω
s EXTREMELY HIGH dv/dt CAPABILITY
s 100% AVALANCHE TESTED
s VERY LOW INTRINSIC CAPACITANCES
s ADD SUFFIX “T4” FOR ORDERING IN TAPE &
REEL
3
1
DPAK
TO-252
3
2
1
IPAK
TO-251
DESCRIPTION
Using the latest high voltage MESH OVERLAY™
process, STMicroelectronics has designed an ad-
vanced family of power MOSFETs with outstanding
performance. The new patented STrip layout cou-
pled with the Company’s proprietary edge termina-
tion structure, makes it suitable in coverters for
lighting applications.
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s HIGH CURRENT, HIGH SPEED SWITCHING
s SWITH MODE POWER SUPPLIES (SMPS)
s DC-DC CONVERTERS FOR TELECOM,
INDUSTRIAL, AND LIGHTING EQUIPMENT
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
VDS
Drain-source Voltage (VGS = 0)
VDGR
Drain-gate Voltage (RGS = 20 kΩ)
VGS
Gate- source Voltage
ID
Drain Current (continuos) at TC = 25°C
ID
Drain Current (continuos) at TC = 100°C
IDM ( ) Drain Current (pulsed)
PTOT
Total Dissipation at TC = 25°C
Derating Factor
dv/dt (1) Peak Diode Recovery voltage slope
Tstg
Storage Temperature
Tj
Max. Operating Junction Temperature
(•)Pulse width limited by safe operating area
June 2003
Value
200
200
± 20
7
4.4
28
45
0.37
5
–65 to 150
150
(1) ISD≤ 7A, di/dt≤300 A/µs, VDD≤ V(BR)DSS, Tj≤TjMAX
Unit
V
V
V
A
A
A
W
W/°C
V/ns
°C
°C
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