STD35NF3LL Datasheet, PDF (1/10 Pages) STMicroelectronics – N-CHANNEL 30V - 0.014 ohm - 35A IPAK/DPAK STripFET™ II POWER MOSFET

STD35NF3LL
STD35NF3LL-1
N-CHANNEL 30V - 0.014 Ω - 35A IPAK/DPAK
STripFET™ II POWER MOSFET
TYPE
V_DSS
R_DS(on)
I_D
STD35NF3LL
STD35NF3LL-1
30 V < 0.0195 Ω 35 A
30 V < 0.0195 Ω 35 A
s TYPICAL R_DS(on) = 0.016 Ω @ 4.5V
s OPTIMAL R_DS(on) x Qg TRADE-OFF @ 4.5V
s CONDUCTION LOSSES REDUCED
s SWITCHING LOSSES REDUCED
s LOW THRESHOLD DRIVE
s THROUGH-HOLE IPAK (TO-251) POWER
PACKAGE IN TUBE (SUFFIX “-1")
s SURFACE-MOUNTING DPAK (TO-252)
POWER PACKAGE IN TAPE & REEL
(SUFFIX “T4")
DESCRIPTION
This application specific Power MOSFET is the third
genaration of STMicroelectronis unique "Single Feature
Size™" strip-based process. The resulting transistor
shows the best trade-off between on-resistance and gate
charge. When used as high and low side in buck
regulators, it gives the best performance in terms of both
conduction and switching losses. This is extremely
important for motherboards where fast switching and
high efficiency are of paramount importance.
3
2
1
IPAK
TO-251
(Suffix “-1”)
3
1
DPAK
TO-252
(Suffix “T4”)
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY DC/DC
CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS
Drain-source Voltage (V_GS = 0)
V_DGR
Drain-gate Voltage (R_GS = 20 kΩ)
V_GS
Gate- source Voltage
I_D
Drain Current (continuos) at T_C = 25°C
I_D
Drain Current (continuos) at T_C = 100°C
I_DM(•)
Drain Current (pulsed)
P_tot
Total Dissipation at T_C = 25°C
Derating Factor
E_AS ⁽¹⁾ Single Pulse Avalanche Energy
T_stg
Storage Temperature
T_j
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area.
February 2002
.
Value
30
30
± 16
35
25
140
50
0.33
300
-55 to 175
(1) Starting Tj = 25 ^oC, ID = 17.5 A, VDD= 24 V
Unit
V
V
V
A
A
A
W
W/°C
mJ
°C
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