STB90NF3LL Datasheet, PDF (1/7 Pages) STMicroelectronics – N-CHANNEL 30V - 0.0048 ohm - 80A D2PAK LOW GATE CHARGE STripFET™ II POWER MOSFET

STB90NF3LL
N-CHANNEL 30V - 0.0048 Ω - 80A D²PAK
LOW GATE CHARGE STripFET™ II POWER MOSFET
PRELIMINARY DATA
TYPE
V_DSS
R_DS(on)
I_D
STB90NF3LL
30 V < 0.0055 Ω 80 A(#)
s TYPICAL R_DS(on) = 0.0048 Ω @ 10 V
s OPTIMAL R_DS(on) x Qg TRADE-OFF @ 4.5 V
s CONDUCTION LOSSES REDUCED
s SWITCHING LOSSES REDUCED
s SURFACE-MOUNTING D²PAK (TO-263)
POWER PACKAGE IN TUBE (NO SUFFIX) OR
IN TAPE & REEL (SUFFIX “T4”)
DESCRIPTION
This application specific Power MOSFET is the third
genaration of STMicroelectronis unique "Single Feature
Size™" strip-based process. The resulting transistor
shows the best trade-off between on-resistance and gate
charge. When used as high and low side in buck
regulators, it gives the best performance in terms of both
conduction and switching losses. This is extremely
important for motherboards where fast switching and
high efficiency are of paramount importance.
3
1
D²PAK
TO-263
(Suffix “T4”)
INTERNAL SCHEMATIC DIAGRAM
APPLICATIONS
s SPECIFICALLY DESIGNED AND OPTIMISED
FOR HIGH EFFICIENCY CPU CORE DC/DC
CONVERTERS
ABSOLUTE MAXIMUM RATINGS
Symbol
Parameter
V_DS
Drain-source Voltage (V_GS = 0)
V_DGR
Drain-gate Voltage (R_GS = 20 kΩ)
V_GS
Gate- source Voltage
I_D(#)
Drain Current (continuous) at T_C = 25°C
I_D
Drain Current (continuous) at T_C = 100°C
I_DM(•)
Drain Current (pulsed)
P_tot
Total Dissipation at T_C = 25°C
Derating Factor
T_stg
Storage Temperature
T_j
Max. Operating Junction Temperature
(•) Pulse width limited by safe operating area.
Value
30
30
± 16
80
80
320
200
1.3
-55 to 175
(#) Value limited by wire bonding
Unit
V
V
V
A
A
A
W
W/°C
°C
September 2002
1/7
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice.