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ST10F280_12 Datasheet, PDF (1/239 Pages) STMicroelectronics – 16-bit MCU with MAC unit, 512 Kbyte Flash memory and 18 Kbyte RAM | |||
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ST10F280
16-bit MCU with MAC unit,
512 Kbyte Flash memory and 18 Kbyte RAM
Datasheet â production data
Features
â High performance cpu with dsp functions
â 16-bit CPU with 4-stage pipeline.
â 50ns Instruction cycle time at 40MHz CPU
clock
â Multiply/accumulate unit (MAC) 16 x 16-bit
multiplication, 40-bit accumulator
â Repeat unit
â Enhanced boolean bit manipulation
facilities
â Additional instructions to support hll and
operating systems
â Single-cycle context switching support
â Memory organization
â 512KB on-chip Flash memory single
voltage with erase/program controller
â 100K erasing/programming cycles
â 20 year data retention time
â Up to 16MB linear address space for code
and data (5MB with CAN)
â 2KB on-chip internal ram (IRAM)
â 16KB extension RAM (XRAM)
â Fast and flexible bus
â Programmable external bus characteristics
for different address ranges
â 8-bit or 16-bit external data bus
â Multiplexed or demultiplexed external
address/data buses
â Five programmable chip-select signals
â Hold-acknowledge bus arbitration support
â Interrupt
â 8-channel peripheral event controller for
single cycle, interrupt driven data transfer
â 16-priority-level interrupt system with 56
sources, sample-rate down to 25ns
â Two multi-functional general purpose timer
units with 5 timers
â Two 16-channel capture/compare units
PBGA208 (23 x 23 x 1.96 - Pitch 1.27 mm)
(Plastic Bold Grid Array)
ORDER CODE: ST10F280-JT3
â A/D converter
â 2X16-channel 10-bit
â 4.85μs conversion time
â One timer for adc channel injection
â 8-channel PWM unit
â Serial channels
â Synchronous/async serial channel
â High-speed synchronous channel
â Fail-safe protection
â Programmable watchdog timer
â Oscillator watchdog
â Two CAN 2.0b interfaces operating on one or
two can busses (30 or 2x15 message objects)
â On-chip bootstrap loader
â Clock generation
â On-chip PLL
â Direct or prescaled clock input
â Up to 143 general purpose i/o lines
â Individually programmable as input, output
or special function
â Programmable threshold (hysteresis)
â Idle and power down modes
â Maximum cpu frequency 40MHz
â Package PBGA 208 balls (23 x 23 x 1.96 mm -
pitch 1.27 mm)
â Single voltage supply: 5 V ±10% (embedded
regulator for 3.3 V core supply)
â Temperature range: -40°C to 125°C
August 2012
This is information on a product in full production.
Doc ID 8673 Rev. 3
1/239
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