ST10C167 Datasheet, PDF (1/65 Pages) STMicroelectronics – 16-BIT MCU WITH 32K BYTE ROM

ST10C167
16-BIT MCU WITH 32K BYTE ROM
s HIGH PERFORMANCE CPU
– 16-BIT CPU WITH 4-STAGE PIPELINE
– 80ns INSTRUCTION CYCLE TIME @ 25MHz CLK
– 400ns 16 X 16-BIT MULTIPLICATION
– 800ns 32 / 16-BIT DIVISION
– ENHANCE D BOOLEAN BIT MANIPULATION
FACILITIES
– ADDITIONAL INSTRUCTIONS TO SUPPOR T HLL
AND OPERATING SYSTEMS
– SINGLE-CYCL E CONT EXT SWITCHING SUPPORT
s MEMORY ORGANIZATION
– 32K BYTE ON-CHIP ROM MEMORY
– UP TO 16M BYTE LINEAR ADDRESS SPACE FOR
CODE AND DATA (5M BYTE WITH CAN)
– 2K BYTE ON-CHIP INTERNAL RAM (IRAM)
– 2K BYTE ON-CHIP EXTENSION RAM (XRAM)
s FAST AND FLEXIBLE BUS
– PROGRAMMABLE
EXTE RNAL
BUS
CHARA CTERISTICS FOR DIFFERENT ADDRESS
RANGES
– 8-BIT OR 16-BIT EXTERNAL DATA BUS
– MULTIPLEXED OR DEMULTIPLEXED EXTERNAL
ADDRE SS/DATA BUSES
– FIVE PROGRAMMABLE CHIP-SELECT SIGNALS
– HOLD-ACKNOWLEDGE
SUPPO RT
s INTERRUPT
BUS
ARBITRATION
– 8-CHANNEL PERIPHERAL EVENT CONTROLLER
FOR SINGLE CYCLE, INTERRUPT DRIVEN DATA
TRANS FER
– 16-PRIORITY-LEVEL INTERRUPT SYSTE M WITH
56 SOURCES, SAMPLE-RATE DOWN TO 40ns
s TIMERS
– TWO MULTI-FUNCTIONAL GENERAL PURPOSE
TIMER UNITS WITH 5 TIMERS
– TWO 16-CHANNEL CAPTURE/COMPARE UNITS
s A/D CONVERTER
– 16-CHANN EL 10-BIT
– 7.76µs CONVERSION TIME
s FAIL-SAFE PROTECTION
– PROGRAMMABLE WATCHDOG TIMER
– OSCILLATOR WATCHDOG
s ON-CHIP CAN 2.0B INTERFACE
s ON-CHIP BOOTSTRAP LOADER
s CLOCK GENERATION
– ON-CHIP PLL
– DIRECT OR PRESCALE D CLOCK INPUT
PQFP144 (28 x 28 mm)
(Plastic Quad Flat Pack)
s UP TO 111 GENERAL PURPOSE I/O LINES
– INDIVIDUALLY PROGRAMMABLE AS INPUT,
OUTPUT OR SPECIA L FUNCTION
– PROGRAMMABLE DRIVE STRENGTH
– PROGRAMMABLE THRESHOLD (HYSTERESIS)
s IDLE AND POWER DOWN MODES
– IDLE CURRENT <95mA
– POWER-DOWN SUPPLY CURRENT <400µA
s 4-CHANNEL PWM UNIT
s SERIAL CHANNELS
– SYNCHRONOUS/ASYN CSERIAL CHANNEL
– HIGH-SPEED SYNCHRON OUS CHANNEL
s DEVELOPMENT SUPPORT
– C-COM PILERS, MACRO-ASSEMBLER PACKAGES,
EMULATORS, EVAL BOARDS, HLL-D EBUGGERS,
SIMULATORS, LOGIC ANALYZER DISASSEM-
BLERS, PROGRAMMING BOARDS
s 144-PIN PQFP PACKAGE
32K
Byte
ROM
XRAM
32
16
16
CPU-Core
PEC
16
16
Internal
RAM
Wa tchdog
Interrupt Controller
16
OSC.
CAN
16
16
8
Port 6
8
Port 5
16
BR G
BR G
Port 3
15
Port 7
8
16
Port 8
8
August 1999
This is advance information on a new product now in development or undergoing evaluation. Details are subject to change without notice.
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