M58LW064A Datasheet, PDF (1/53 Pages) STMicroelectronics – 64 Mbit x16 and x16/x32, Block Erase Low Voltage Flash Memories

M58LW064A
M58LW064B
64 Mbit (x16 and x16/x32, Block Erase)
Low Voltage Flash Memories
PRODUCT PREVIEW
s M58LW064A x16 organisation,
s M58LW064B x16/x32 selectable
s MULTI-BIT CELL for HIGH DENSITY and LOW
COST
s SUPPLY VOLTAGE
– V_DD = 2.7V to 3.6V Supply Voltage
– V_DDQ = 2.7V to 3.6V or 1.8V to 2.5V
Input/Output Supply Voltage
s PIPELINED SYNCHRONOUS BURST
INTERFACE
s SYNCHRONOUS/ASYNCHRONOUS READ
– Synchronous Burst read
– Asynchronous Random and Latch Enabled
Controlled Read, with Page Read
s ACCESS TIME
– Synchronous Burst Read up to 66MHz
– Asynchronous Page Mode Read 150/25ns,
Random Read 150ns
s PROGRAMMING TIME
– 16 Word or 8 Double-Word Write Buffer
– 12us Word effective programming time
s MEMORY BLOCKS
– 64 Equal blocks of 1 Mbit
s ELECTRONIC SIGNATURE
– Manufacturer Code: 20h
– Device Code M58LW064A: 17h
– Device Code M58LW064B: 14h
TSOP56 (NF)
86
1
TSOP86 II (NH)
PQFP80 (T)
FBGA
LBGA54 (ZA)
Figure 1. Logic Diagram
VDD VDDQ
22
A1-A22
VPP
32
DQ0-DQ31
W
E
RB
M58LW064A
G
M58LW064B
R
RP
DESCRIPTION
L
The M58LW064 is a non-volatile Flash memory
B
that may be erased electrically at the block level
and programmed in-system on a 16 Word or 8
K
Double-Word basis using a 2.7V to 3.6V supply for
the circuit and a supply down to 1.8V for the Input
WORD ⁽¹⁾
and Output buffers. The M58LW064A is organised
as 4M by 16 bit. The M58LW064B has 4M by 16
bit or 2M by 32 bit organisation selectable by the
Word Organisation WORD input. Both devices are
VSS
internally configured as 64 blocks of 1 Mbit each.
AI03223
Note: 1. Only on M58LW064B.
May 2000
This is preliminary information on a new product now in development. Details are subject to change without notice.
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