HCF4517B_02 Datasheet, PDF (1/8 Pages) STMicroelectronics – DUAL 64 STAGE STATIC SHIFT REGISTER

HCF4517B
DUAL 64 STAGE STATIC SHIFT REGISTER
s CLOCK FREQUENCY 12MHz (Typ.)
at V_DD = 10V
s SCHMITT TRIGGER CLOCK INPUTS
ALLOWS OPERATION WITH VERY SLOW
CLOCK RISE AND FALL TIMES
s THREE STATE OUTPUTS
s QUIESCENT CURRENT SPECIFIED UP TO
20V
s STANDARDIZED, SYMMETRICAL OUTPUT
CHARACTERISTCS
s 5V, 10V AND 15V PARAMETRIC RATINGS
s INPUT LEAKAGE CURRENT
I_I = 100nA (MAX) AT V_DD = 18V T_A = 25°C
s 100% TESTED FOR QUIESCENT CURRENT
s MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTION
HCF4517B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP package.
This device is a dual 64-stage static shift register
consisting of two independent registers each
having a clock, data, and write enable input and
outputs accessible by stages following the 16th,
DIP
ORDER CODES
PACKAGE
TUBE
DIP
SOP
HCF4517BEY
HCF4517BM1
T&R
HCF4517M013TR
32nd, 48th, and 64th stages. These stages also
serve as input points allowing data to be put in at
the 17th , 33rd, and 49th stages when the write
enable input is a logic 1 and the clock goes
through a low to high transition. The truth table
indicates how the clock and write enable inputs
control the operation of HCF4517B. Inputs at the
intermediate stages allow entry of 64-bits into the
register with 16 clock pulses. The 3-state outputs
permit connection of this device to an external
bus.
PIN CONNECTION
September 2002
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