HCF4510B_02 Datasheet, PDF (1/11 Pages) STMicroelectronics – PRESETTABLE BCD UP/DOWN COUNTER

HCF4510B
PRESETTABLE BCD UP/DOWN COUNTER
s MEDIUM SPEED OPERATION :
8 MHz (Typ.) at 10V
s SYNCHRONOUS INTERNAL CARRY
PROPAGATION
s RESET AND PRESET CAPABILITY
s STANDARDIZED SYMMETRICAL OUTPUT
CHARACTERISTICS
s QUIESCENT CURRENT SPECIF. UP TO 20V
s 5V, 10V AND 15V PARAMETRIC RATINGS
s INPUT LEAKAGE CURRENT
I_I = 100nA (MAX) AT V_DD = 18V T_A = 25°C
s 100% TESTED FOR QUIESCENT CURRENT
s MEETS ALL REQUIREMENTS OF JEDEC
JESD13B "STANDARD SPECIFICATIONS
FOR DESCRIPTION OF B SERIES CMOS
DEVICES"
DESCRIPTION
HCF4510B is a monolithic integrated circuit
fabricated in Metal Oxide Semiconductor
technology available in DIP package.
It is a PRESETTABLE BCD UP/DOWN
COUNTER consists of four synchronously
clocked D-type flip-flops (with a gating structure to
provide T-type flip-flop capability) connected as a
counter. This counter can be cleared by a high
level on the RESET line, and can be preset to any
binary number present on the jam inputs by a high
level on the PRESET ENABLE line. This device
will count out of non-BCD counter states in a
maximum of two clock pulses in the up mode and
PIN CONNECTION
DIP
ORDER CODES
PACKAGE
TUBE
DIP
HCF4510BEY
T&R
a maximum of four clock pulses in the down mode.
If the CARRY IN input is held low, the counter
advances up or down on each positive going clock
transition. Synchronous cascading is
accomplished by connecting all clock inputs in
parallel and connecting the CARRY OUT of a less
significant stage to the CARRY IN of a more
significant stage. HCF4510B can be cascaded in
the ripple mode by connecting all clock inputs in
parallel and connecting the CARRY OUT to the
clock of the next stage. If the UP/DOWN input
changes during a terminal count, the CARRY OUT
must be gated with the clock, and the UP/DOWN
input must change while the clock is high. This
method provides a clean clock signal to the
subsequent counting stage.
September 2002
1/11