74LCX240M Datasheet, PDF (1/9 Pages) STMicroelectronics – LOW VOLTAGE CMOS OCTAL BUS BUFFER (3-STATE INV) WITH 5V TOLERANT INPUTS AND OUTPUTS

74LCX240
LOW VOLTAGE CMOS OCTAL BUS BUFFER (3-STATE INV.)
WITH 5V TOLERANT INPUTS AND OUTPUTS
s 5V TOLERANT INPUTS AND OUTPUTS
s HIGH SPEED :
t_PD = 6.5 ns (MAX.) at V_CC = 3V
s POWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|I_OH| = I_OL = 24mA (MIN) at V_CC = 3V
s PCI BUS LEVELS GUARANTEED AT 24 mA
s BALANCED PROPAGATION DELAYS:
t_PLH ≅ t_PHL
s OPERATING VOLTAGE RANGE:
V_CC(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 240
s LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
s ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX240 is a low voltage CMOS OCTAL
BUS BUFFER fabricated with sub-micron silicon
gate and double-layer metal wiring C²MOS
technology. It is ideal for low power and high
SOP
TSSOP
ORDER CODES
PACKAGE
SOP
TSSOP
TUBE
74LCX240M
T&R
74LCX240MTR
74LCX240TTR
speed 3.3V applications; it can be interfaced to 5V
signal environment for both inputs and outputs.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
This device is designed to be used with 3 state
memory address drivers, etc.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
September 2001
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