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| 74AC10_01 Datasheet, PDF (1/8 Pages) STMicroelectronics – TRIPLE 3-INPUT NAND GATE | |||
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74AC10
TRIPLE 3-INPUT NAND GATE
s HIGH SPEED: tPD = 4ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 2µA(MAX.) at TA=25°C
s HIGH NOISE IMMUNITY:
VNIH = VNIL = 28 % VCC (MIN.)
s 50⦠TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH â
tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 2V to 6V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 10
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The 74AC10 is an advanced high-speed CMOS
TRIPLE 3-INPUT NAND GATE fabricated with
sub-micron silicon gate and double-layer metal
wiring C2MOS tecnology.
DIP
SOP
TSSOP
ORDER CODES
PACKAGE
DIP
SOP
TSSOP
TUBE
74AC10B
74AC10M
T&R
74AC10MTR
74AC10TTR
The internal circuit is composed of 3 stages
including buffer output, which enables high noise
immunity and stable output.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
PIN CONNECTION AND IEC LOGIC SYMBOLS
April 2001
1/8
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