CGA-6618 Datasheet, PDF (4/5 Pages) Stanford Microdevices – DUAL CATV BROADBAND HIGH LINEARITY GAAS HBT AMPLIFIER

Preliminary
CGA-6618 Dual GaAs HBT Amplifier
Pin # Function
Description
1
RF IN RF input pin. This pin requires the use of an external DC blocking capacitor as shown in the
Device 1 schematic.
2,3
Ground
Connection to ground. Use via holes for best performance to reduce lead inductance as close
to ground leads as possible.
4
RF IN
Device 2
Same as pin 1
RF output and bias pin. Bias should be supplied to this pin through an external series resistor
5
RF OUT / Vcc and RF choke inductor. Because DC biasing is present on this pin, a DC blocking capacitor
Device 2 should be used in most applications (see application schematic). The supply side of the bias
network should be well bypassed.
6,7
Ground Same as pins 2 and 3
8
EPAD
RF OUT / Vcc
Device 1
Same as pin 5
Ground
Exposed area on the bottom side of the package must be soldered to the ground plane of the
board for optimum thermal and RF performance. Several vias should be located under the
EPAD as shown in the recommended land pattern below.
Device Pin Out
1
8
2
7
3
6
4
5
Basic Application Schematic 50-860 MHz
Vs
1µF Tant. 0.01µF 1000pF 68pF
RBIAS
Macom
ETC1-1-13
1
1000 pF
2,3
Amp 1
220 nH
8
1000 pF
6,7
1000 pF
4
Amp 2
Macom
1000 pF ETC1-1-13
5
CGA-6618
SOIC-08
220 nH
1µF Tant. 0.01µF 1000pF 68pF
RBIAS
Vs
Recommended Bias Resistor Values for I_D=160mA
Supply Voltage(V_S)
8V
9V 12V 15V
R_BIAS
39
56
91
130
R_BIAS Power Rating 1/2W 1/2W 1W
1W
R_BIAS=
2(V_S-V_D)
I_D
Evalution Board Layout 50-860 MHz
RF INPUT
Balun ETC1-1-13
1000pF
Rbias
1uF Tant.
RF OUTPUT
.01uF
1000pF
68pF
220nH
1000pF
Balun ETC1-1-13
1000pF
1000pF
220nH
68pF
1000pF
.01uF
ECB-101611 Rev A
1uF Tant.
ESOP-8
Push-Pull
Rbias
Eval Board
Recommended Land Pattern
.15 [3.81]
.24 [6.22]
.16 [4.02] .33 [8.42]
.11 [2.71]
.05 [1.27]
.02 [.60]
726 Palomar Ave., Sunnyvale, CA 94085
Phone: (800) SMI-MMIC
4
http://www.stanfordmicro.com
EDS-101994 Rev B