SST25VF020B Datasheet, PDF (27/33 Pages) Silicon Storage Technology, Inc – 2 Mbit SPI Serial Flash

2 Mbit SPI Serial Flash
SST25VF020B
Data Sheet
Power-Up Specifications
All functionalities and DC specifications are specified for a V_DD ramp rate of greater than 1V per 100 ms (0v - 3.0V
in less than 300 ms). See Table 14 and Figure 27 for more information.
TABLE 14: Recommended System Power-up Timings
Symbol
Parameter
Minimum
Units
T_PU-READ1
V_DD Min to Read Operation
100
µs
T_PU-WRITE1
V_DD Min to Write Operation
100
µs
T14.0 1417
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
VDD
VDD Max
Chip selection is not allowed.
Commands may not be accepted or properly
interpreted by the device.
VDD Min
TPU-READ
TPU-WRITE
Device fully accessible
FIGURE 27: Power-up Timing Diagram
Time
1417 PwrUp.0
©2010 Silicon Storage Technology, Inc.
27
S71417-02-000
04/10