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| SST36VF1601G Datasheet, PDF (18/36 Pages) Silicon Storage Technology, Inc – 16 Mbit (x8/x16) Concurrent SuperFlash | |||
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16 Mbit Concurrent SuperFlash
SST36VF1601G / SST36VF1602G
Data Sheet
TABLE 10: DC Operating Characteristics VDD = 2.7-3.6V
Limits
Symbol
IDD1
Parameter
Active VDD Current
Read
Freq Min
Max
5 MHz
15
1 MHz
4
Program and Erase
30
Concurrent Read/Write
5 MHz
45
1 MHz
35
ISB
Standby VDD Current
20
IALP
Auto Low Power VDD Current
20
IRT
ILI
ILIW
ILO
VIL
VILC
VIH
VIHC
VOL
VOH
Reset VDD Current
Input Leakage Current
Input Leakage Current
on WP# pin and RST# pin
Output Leakage Current
Input Low Voltage
Input Low Voltage (CMOS)
Input High Voltage
Input High Voltage (CMOS)
Output Low Voltage
Output High Voltage
20
1
10
0.7 VDD
VDD-0.3
VDD-0.2
1
0.8
0.3
VDD+0.3
VDD+0.3
0.2
1. Address input = VILT/VIHT, VDD=VDD Max (See Figure 23)
Units
mA
mA
mA
mA
mA
µA
µA
µA
µA
µA
µA
V
V
V
V
V
V
Test Conditions
CE#=VIL, WE#=OE#=VIH
CE#=WE#=VIL, OE#=VIH
CE#=VIL, OE#=VIH
CE#, RST#=VDD±0.3V
CE#=0.1V, VDD=VDD Max
WE#=VDD-0.1V
Address inputs=0.1V or VDD-0.1V
RST#=GND
VIN =GND to VDD, VDD=VDD Max
WP#=GND to VDD, VDD=VDD Max
RST#=GND to VDD, VDD=VDD Max
VOUT =GND to VDD, VDD=VDD Max
VDD=VDD Min
VDD=VDD Max
VDD=VDD Max
VDD=VDD Max
IOL=100 µA, VDD=VDD Min
IOH=-100 µA, VDD=VDD Min
T10.1 1342
TABLE 11: Recommended System Power-up Timings
Symbol
Parameter
Minimum
Units
TPU-READ1
TPU-WRITE1
Power-up to Read Operation
Power-up to Write Operation
100
µs
100
µs
T11.0 1342
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 12: Capacitance (TA = 25°C, f=1 Mhz, other pins open)
Parameter
Description
Test Condition
Maximum
CI/O1
CIN1
I/O Pin Capacitance
Input Capacitance
VI/O = 0V
VIN = 0V
10 pF
10 pF
T12.0 1342
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
TABLE 13: Reliability Characteristics
Symbol
Parameter
Minimum Specification
Units Test Method
NEND1
Endurance
10,000
Cycles JEDEC Standard A117
TDR1
ILTH1
Data Retention
Latch Up
100
100 + IDD
Years JEDEC Standard A103
mA JEDEC Standard 78
T13.0 1342
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
©2006 Silicon Storage Technology, Inc.
18
S71342-00-000
12/06
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