SST34HF162G Datasheet, PDF (17/31 Pages) Silicon Storage Technology, Inc – 16 Mbit Dual-Bank Flash + 2/4 Mbit SRAM ComboMemory

16 Mbit Dual-Bank Flash + 2/4 Mbit SRAM ComboMemory
SST34HF162G / SST34HF164G
Preliminary Specifications
ADDRESSES
A_MSS³-0
WE#
T_WCS
TWPS
T_BWS
TWRS
BES#
TASTS
T_AWS
TBYWS
UBS#, LBS#
TDSS
TDHS
DQ_15-8, DQ_7-0
NOTE 2
VALID DATA IN
NOTE 2
1276 F06.0
Note: 1. If OE# is High during the Write cycle, the outputs will remain at high impedance.
2. Because D_IN signals may be in the output state at this time, input signals of reverse polarity must not be applied.
3. A_MSS = Most Significant SRAM Address
A_MSS = A₁₆ for SST34HF162G and A₁₇ for SST34HF164G
FIGURE 6: SRAM WRITE CYCLE TIMING DIAGRAM (UBS#, LBS# CONTROLLED)¹
ADDRESS A19-0
BEF#
OE#
WE#
DQ_15-0
VIH
HIGH-Z
T_RC
T_AA
T_CE
T_OE
TOLZ
T_CLZ
TOH
DATA VALID
FIGURE 7: FLASH READ CYCLE TIMING DIAGRAM
TOHZ
T_CHZ
DATA VALID
HIGH-Z
1276 F07.0
©2004 Silicon Storage Technology, Inc.
17
S71276-00-000
11/04