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SST34HF1681 Datasheet, PDF (15/30 Pages) Silicon Storage Technology, Inc – 16 Mbit Concurrent SuperFlash + 8 Mbit SRAM ComboMemory
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16 Mbit Concurrent SuperFlash + 8 Mbit SRAM ComboMemory
SST34HF1681
Advance Specifications
TABLE 14: FLASH READ CYCLE TIMING PARAMETERS VDD = 2.7-3.3V
SST34HF1681-70
SST34HF1681-90
Symbol Parameter
Min
Max
Min
Max
Units
TRC
Read Cycle Time
70
90
ns
TCE
Chip Enable Access Time
70
90
ns
TAA
Address Access Time
70
90
ns
TOE
Output Enable Access Time
35
45
ns
TCLZ1
BEF# Low to Active Output
0
TOLZ1
OE# Low to Active Output
0
0
ns
0
ns
TCHZ1
BEF# High to High-Z Output
20
30
ns
TOHZ1
TOH1
OE# High to High-Z Output
Output Hold from Address Change
20
30
ns
0
0
ns
TRP1
RST# Pulse Width
500
500
ns
TRHR1
TRY1,2
RST# High Before Read
RST# Pin Low to Read
50
50
ns
100
100
µs
T14.0 561
1. This parameter is measured only for initial qualification and after the design or process change that could affect this parameter.
2. This parameter applies to Sector-Erase, Block-Erase and Program operations. This parameter does not apply to Chip-Erase.
TABLE 15: FLASH PROGRAM/ERASE CYCLE TIMING PARAMETERS
Symbol Parameter
Min
TBP
Word-Program Time
TAS
Address Setup Time
0
TAH
Address Hold Time
40
TCS
WE# and BEF# Setup Time
0
TCH
WE# and BEF# Hold Time
0
TOES
OE# High Setup Time
0
TOEH
OE# High Hold Time
10
TCP
BEF# Pulse Width
40
TWP
WE# Pulse Width
40
TWPH1
WE# Pulse Width High
30
TCPH1
BEF# Pulse Width High
30
TDS
Data Setup Time
30
TDH1
Data Hold Time
0
TIDA1
Software ID Access and Exit Time
TBY1
RY/BY# Delay Time
90
TBR1
Bus# Recovery Time
TSE
Sector-Erase
TBE
Block-Erase
TSCE
Chip-Erase
Max
20
150
1
25
25
100
1. This parameter is measured only for initial qualification and after a design or process change that could affect this parameter.
Units
µs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
µs
ms
ms
ms
T15.2 561
©2001 Silicon Storage Technology, Inc.
15
S71214-00-000 12/01 561
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