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SST39VF800Q Datasheet, PDF (1/23 Pages) Silicon Storage Technology, Inc – 8 Megabit (512K x 16-Bit) Multi-Purpose Flash
8 Megabit (512K x 16-Bit) Multi-Purpose Flash
SST39VF800Q / SST39VF800
Advance Information
FEATURES:
• Organized as 512 K X 16
• Latched Address and Data
• Single 2.7-3.6V Read and Write Operations
• Fast Sector Erase and Word Program:
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• VDDQ Power Supply to Support 5V I/O
for SST39VF800Q
- VDDQ not available on SST39VF800
• Superior Reliability
- Endurance: 100,000 Cycles (typical)
- Greater than 100 years Data Retention
• Low Power Consumption:
- Active Current: 15 mA (typical)
- Standby Current: 3 µA (typical)
- Auto Low Power Mode: 3 µA (typical)
• Small Sector Erase Capability (256 sectors)
- Uniform 2 KWord sectors
• Block Erase Capability (16 blocks)
- Uniform 32 KWord blocks
• Fast Read Access Time:
- 70 and 90 ns
- Sector Erase Time: 18 ms (typical)
- Block Erase Time: 18 ms (typical)
- Chip Erase Time: 70 ms (typical)
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- Word Program time: 14 µs (typical)
- Chip Rewrite Time: 8 seconds (typical)
• Automatic Write Timing
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- Internal VPP Generation
• End of Write Detection
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- Toggle Bit
- Data# Polling
• CMOS I/O Compatibility
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• JEDEC Standard
- Flash EEPROM Pinouts and command sets
• Packages Available
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- 48-Pin TSOP (12mm x 20mm)
- 6 x 8 Ball TFBGA
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PRODUCT DESCRIPTION
herently use less energy during Erase and Program than
The SST39VF800Q/VF800 devices are 512K x 16
CMOS Multi-Purpose Flash (MPF) manufactured with
alternative flash technologies. The total energy con-
sumed is a function of the applied voltage, current, and
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SST’s proprietary, high performance CMOS SuperFlash
time of application. Since for any given voltage range, the
technology. The split-gate cell design and thick oxide
tunneling injector attain better reliability and
SuperFlash technology uses less current to program and
has a shorter erase time, the total energy consumed
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manufacturability compared with alternate approaches.
during any Erase or Program operation is less than
The SST39VF800Q/VF800 write (Program or Erase)
with a 2.7-3.6V power supply. The SST39VF800Q/
alternative flash technologies. The SST39VF800Q/
VF800 also improve flexibility while lowering the cost for
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VF800 conform to JEDEC standard pinouts for x16
program, data, and configuration storage applications.
memories.
Featuring high performance word program, the
The SuperFlash technology provides fixed Erase and
Program times, independent of the number of Erase/
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SST39VF800Q/VF800 devices provide a typical word
Program cycles that have occurred. Therefore the sys-
program time of 14 µsec. The entire memory can typi-
cally be erased and programmed word-by-word in 8
tem software or hardware does not have to be modified
or de-rated as is necessary with alternative flash tech-
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seconds, when using interface features such as Toggle
nologies, whose erase and program times increase with
Bit or Data# Polling to indicate the completion of Program
accumulated Erase/Program cycles.
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operation. To protect against inadvertent write, the To meet high density, surface mount requirements, the
SST39VF800Q/VF800 have on-chip hardware and soft- SST39VF800Q/VF800 are offered in 48-pin TSOP and
ware data protection schemes. Designed, manufac-
48-pin TFBGA packages. See Figures 1 and 2 for
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tured, and tested for a wide spectrum of applications, the pinouts.
SST39VF800Q/VF800 are offered with a guaranteed
endurance of 10,000 cycles. Data retention is rated at
greater than 100 years.
Device Operation
Commands are used to initiate the memory operation
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The SST39VF800Q/VF800 devices are suited for appli-
functions of the device. Commands are written to the
cations that require convenient and economical updating
of program, configuration, or data memory. For all sys-
device using standard microprocessor write sequences.
A command is written by asserting WE# low while
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tem applications, the SST39VF800Q/VF800 signifi-
keeping CE# low. The address bus is latched on the
cantly improve performance and reliability, while lower-
falling edge of WE# or CE#, whichever occurs last. The
ing power consumption. The SST39VF800Q/VF800 in-
data bus is latched on the rising edge of WE# or CE#,
whichever occurs first.
© 1999 Silicon Storage Technology, Inc.The SST logo and SuperFlash are registered trademarks of Silicon Storage Technology, Inc. MPF is a trademark of Silicon Storage Technology, Inc.
343-04 2/99
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These specifications are subject to change without notice.