W48C101-01 Datasheet, PDF (8/8 Pages) Cypress Semiconductor – Spread Spectrum BX System Frequency Generator

W48C101-01
48-MHz Clock Outputs (Lump Capacitance Test Load = 20 pF = 66.6/100 MHz)
Parameter
Description
f
Frequency, Actual
f_D
Deviation from 48 MHz
m/n
PLL Ratio
t_R
Output Rise Edge Rate
t_F
Output Fall Edge Rate
t_D
Duty Cycle
f_ST
Frequency Stabilization
from Power-up (cold start)
Z_o
AC Output Impedance
Test Condition/Comments
Determined by PLL divider ratio (see m/n below)
(48.008 – 48)/48
(14.31818 MHz x 57/17 = 48.008 MHz)
Measured from 0.4V to 2.4V
Measured from 2.4V to 0.4V
Measured on rising and falling edge at 1.5V
Assumes full supply voltage reached within 1 ms
from power-up. Short cycles exist prior to
frequency stabilization.
Average value during switching transition. Used
for determining series termination value.
CPU = 66.6/100 MHz
Min. Typ. Max.
48.008
+167
57/17
1
4
1
4
45
55
3
25
Unit
MHz
ppm
V/ns
V/ns
%
ms
:
Ordering Information
Ordering Code
W48C101
Freq. Mask
Code
-01
Package
Name
H
Package Type
48-pin SSOP (300 mils)
Package Diagram
48-Lead Shrunk Small Outline Package O48
While SLI has reviewed all information herein for accuracy and reliability, Spectra Linear Inc. assumes no responsibility for the use of any cir-
cuitry or for the infringement of any patents or other rights of third parties which would result from each use. This product is intended for use in
normal commercial applications and is not warranted nor is it intended for use in life support, critical medical instruments, or any other applica-
tion requiring extended temperature range, high reliability, or any other extraordinary environmental requirements unless pursuant to additional
processing by Spectra Linear Inc., and expressed written agreement by Spectra Linear Inc. Spectra Linear Inc. reserves the right to change any
circuitry or specification without notice.
Rev 1.0, November 28, 2006
Page 8 of 8