W48C101-01 Datasheet, PDF (5/8 Pages) Cypress Semiconductor – Spread Spectrum BX System Frequency Generator

W48C101-01
Absolute Maximum Ratings^[1]
Stresses greater than those listed in this table may cause
permanent damage to the device. These represent a stress
rating only. Operation of the device at these or any other condi-
tions above those specified in the operating sections of this
specification is not implied. Maximum conditions for extended
periods may affect reliability.
Parameter
V_DD, V_IN
T_STG
T_A
T_B
ESD_PROT
Description
Voltage on any pin with respect to GND
Storage Temperature
Operating Temperature
Ambient Temperature under Bias
Input ESD Protection
Rating
Unit
–0.5 to +7.0
V
–65 to +150
°C
0 to +70
°C
–55 to +125
°C
2 (min.)
kV
DC Electrical Characteristics: T_A = 0°C to +70°C, V_DDQ3 = 3.3V±5%, V_DDQ2 = 2.5V±5%
Parameter
Description
Test Condition
Min. Typ. Max.
Supply Current
I_DDQ3
3.3V Supply Current
CPU0:3 = 100 MHz
120
Outputs Loaded^[2]
I_DDQ2
2.5V Supply Current
CPU0:3 = 100 MHz
65
Outputs Loaded^[2]
Logic Inputs
V_IL
Input Low Voltage
V_IH
Input High Voltage
I_IL
Input Low Current^[3]
I_IH
Input High Current^[3]
I_IL
Input Low Current (SEL100/66#)
I_IH
Input High Current (SEL100/66#)
Clock Outputs
GND – 0.3
2.0
0.8
V_DD + 0.3
–25
10
–5
5
V_OL
Output Low Voltage
I_OL = 1 mA
50
V_OH
Output High Voltage
I_OH = –1 mA
3.1
V_OH
Output High Voltage
CPU0:3, APIC0:1 I_OH = –1 mA
2.2
I_OL
Output Low Current
CPU0:3
V_OL = 1.25V
45
65
100
PCI_F, PCI1:7
V_OL = 1.5V
70
100
145
APIC0:1
V_OL = 1.25V
60
90
140
REF0:2
V_OL = 1.5V
45
65
100
48MHz
V_OL = 1.5V
45
65
100
I_OH
Output High Current
CPU0:3
V_OL = 1.25V
45
65
100
PCI_F, PCI1:7
V_OL = 1.5V
65
95
135
APIC0:1
V_OL = 1.25V
55
80
115
REF0:2
V_OL = 1.5V
45
65
100
48MHz
V_OL = 1.5V
45
65
100
Notes:
: ^{1. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.}
2. All clock outputs loaded with 6" 60 transmission lines with 20-pF capacitors.
3. W48C101-01 logic inputs have internal pull-up devices, except SEL100/66# (pull-ups not full CMOS level).
Unit
mA
mA
V
V
µA
µA
µA
µA
mV
V
V
mA
mA
mA
mA
mA
mA
mA
mA
mA
mA
Rev 1.0, November 28, 2006
Page 5 of 8