W254B Datasheet, PDF (4/16 Pages) SpectraLinear Inc – 133MHz Spread Spectrum FTG for Mobile Pentium® III Platforms

W254B
Offsets Among Clock Signal Groups
Figure 2 and Figure 3 represent the phase relationship among
the different groups of clock outputs from W254B when it is
providing a 66-MHz CPU clock and a 100-MHz CPU clock,
respectively. It should be noted that when CPU clock is
operating at 100 MHz, CPU clock output is 180 degrees out of
phase with SDRAM clock outputs.
0 ns
10 ns
20 ns
30 ns
40 ns
CPU 66-MHz
SDRAM 100-MHz
3V66 66-MHz
PCI 33-MHz
APIC33-MHz
REF 14.318-MHz
Cycle Repeats
USB 48-MHz
DOT 48-MHz
Figure 2. Group Offset Waveforms (66 Mhz CPU/100 MHz SDRAM Clock)
Table 3. 66 MHz Group Timing Relationships and Tolerances
Table 4.
Offset
Tolerance
CPU to
SDRAM
–2.5 ns
500 ps
CPU to 3V66 SDRAM to 3V66
7.5 ns
0.0 ns
500 ps
500 ps
3V66 to PCI
1.5-3.5 ns
500 ps
PCI to APIC
0.0 ns
1.0 ns
USB & DOT
Async
N/A
CPU 100-MHz
SDRAM 100-MHz
3V66 66-MHz
PCI 33-MHz
APIC33-MHz
REF 14.318-MHz
USB 48-MHz
DOT 48-MHz
0 ns
10 ns
Cycle Repeats
20 ns
30 ns
40 ns
Figure 3. Group Offset Waveforms (100 MHz CPU/100 MHz SDRAM Clock)
Rev 1.0, November 20, 2006
Page 4 of 16