W254B Datasheet, PDF (10/16 Pages) SpectraLinear Inc – 133MHz Spread Spectrum FTG for Mobile Pentium® III Platforms

W254B
Byte 0: Control Register (1 = Enable, 0 = Disable)^[9]
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
19
--
43
44
--
22
21
--
Name
VCH_CLK
Reserved Drive to ’0’
CPU_F
CPU
Spread Spectrum (1 = On; 0 = Off)
DOT (48 MHz)
USB (48 MHz)
Reserved Drive to ’0’
Pin Description
(Active/Inactive)
(Active/Inactive)
(Disabled/Enabled)
(Disabled/Enabled)
(Active/Inactive)
(Disabled/Enabled)
(Disabled/Enabled)
(Active/Inactive)
Byte 1: Control Register (1 = Enable, 0 = Disable)^[9]
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
--
--
33
34
36
37
39
40
Name
Reserved Drive to ’0’
Reserved Drive to ’0’
SDRAM5
SDRAM4
SDRAM3
SDRAM2
SDRAM1
SDRAM0
Pin Description
(Active/Inactive)
(Active/Inactive)
(Disabled/Enabled)
(Disabled/Enabled)
(Disabled/Enabled)
(Disabled/Enabled)
(Disabled/Enabled)
(Disabled/Enabled)
Byte 2: Control Register (1 = Enable, 0 = Disable)^[9]
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Pin#
17
16
15
--
--
--
--
--
Name
3V66_AGP
3V66_1
3V66_0
Reserved Drive to ’0’
Reserved Drive to ’0’
Reserved Drive to ’0’
Reserved Drive to ’0’
Reserved Drive to ’0’
Pin Description
(Disabled/Enabled)
(Disabled/Enabled)
(Disabled/Enabled)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
(Active/Inactive)
Note:
9. Inactive means outputs are held LOW and are disabled from switching. These outputs are designed to be configured at power-on and are not expected to be
configured during the normal modes of operation.
Byte 3: Control Register (1 = Enable, 0 = Disable)
Bit
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Pin#
-
13
12
11
10
Name
Reserved Drive to ’0’
PCI6
PCI5
PCI4
PCI3
Bit 2
Bit 1
Bit 0
8
PCI2
7
PCI1/FS1
--
SDRAM 133-MHz Mode Enable
Pin Description
(Active/Inactive)
(Disabled/Enabled)
(Disabled/Enabled)
(Disabled/Enabled)
(Disabled/Enabled)
(Disabled/Enabled)
(Disabled/Enabled)
Default is Disabled = ‘0’, Enabled = ’1’
Rev 1.0, November 20, 2006
Page 10 of 16