CY2SSTU32866 Datasheet, PDF (16/24 Pages) SpectraLinear Inc – 1.8V, 25-bit (1:1) of 14-bit (1:2) JEDEC-Compliant Data Register with Parity

CY2SSTU32866
C0 = 1, C1 = 1 (RESET switches from H to L)
RESET
DCS†
CSR†
CLK†
CLK†
D1−D14†
Q1−Q14
PAR_IN†
PPO
(not used)
tRPHL
RESET to Q
tRPHL
RESET to PPO
tinact _{ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ}
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ
QERR
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎ_{H, L, or X}
tRPLH
RESET to QERR
H or L
Figure 12. CY2SSTU32866 used as pair, C0=1, C1=1, RST# switches from H to L
Rev 1.0, November 25, 2006
Page 16 of 24