CY28301 Datasheet, PDF (10/13 Pages) Cypress Semiconductor – Frequency Generator for Intel Integrated Chipset

CY28301
Table 5. Frequency Selections through HW Strap Option and Serial Data Interface Data Bytes
Input Conditions
Output Frequency
FS1
FS0
SEL1
SEL0
CPU
SDRAM
3V66
PCI
0
0
66.6
100.0
66.6
33.3
0
1
100.0
100.0
66.6
33.3
1
0
133.3
133.3
66.6
33.3
1
1
133.3
100.0
66.6
33.3
APIC
16.6
16.6
16.6
16.6
DC Electrical Characteristics^[2]
DC parameters must be sustainable under steady state (DC) conditions.
Absolute Maximum DC Power Supply
Parameter
Description
V_DDQ3
V_DDQ2
T_S
3.3V Core Supply Voltage
2.5V I/O Supply Voltage
Storage Temperature
Absolute Maximum DC I/O
Parameter
Description
V_i/o3
V_i/o3
ESD prot.
3.3V Core Supply Voltage
2.5V I/O Supply Voltage
Input ESD Protection
Min.
–0.5
–0.5
–65
Min.
–0.5
–0.5
2000
Max.
Unit
4.6
V
3.6
V
150
°C
Max.
Unit
4.6
V
3.6
V
V
DC Operating Requirements
Parameter
Description
Condition
Min.
Max.
Unit
V_DD3
3.3V Core Supply Voltage 3.3V ±5%
3.135
3.465
V
V_DDQ3
3.3V I/O Supply Voltage
3.3V ±5%
3.135
3.465
V
V_DDQ2
2.5V I/O Supply Voltage
2.5V ±5%
2.375
2.625
V
V_DD3 = 3.3V ±5%
V_ih3
3.3V Input High Voltage
V_DD3
2.0
V_DD + 0.3
V
V_il3
3.3V Input Low Voltage
V_SS – 0.3
0.8
V
I_il
Input Leakage Current^[3]
0 < V_in <V_DD3
–5
+5
µA
V_DDQ2 = 2.5V ±5%
V_oh2
2.5V Output High Voltage
I_oh = (–1 mA)
2.0
V
V_ol2
2.5V Output Low Voltage
I_ol = (1 mA)
0.4
V
V_DDQ3 = 3.3V ±5%
V_oh3
3.3V Output High Voltage
I_oh = (–1 mA)
.4
V
V_ol3
3.3V Output Low Voltage
I_ol = (1 mA)
0.4
V
V_DDQ3 = 3.3V ±5%
V_poh3
PCI Bus Output High Voltage I_oh = (–1 mA)
2.4
V
V_pol3
PCI Bus Output Low Voltage I_ol = (1 mA)
0.55
V
Note:
2. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
3. Input leakage current does not include inputs with pull-up or pull-down resistors.
Rev 1.0, November 27, 2006
Page 10 of 13