CY28416 Datasheet, PDF (1/14 Pages) Cypress Semiconductor – Next Generation FTG for Intel-R Architecture

CY28416
Next Generation FTG for Intel^® Architecture
Features
• Supports Intel Pentium^®4-Type CPUs
• Selectable CPU Frequencies
• Two Differential CPU Clock Pairs
• Four 100 MHz Differential SRC Clock Pairs
• One CPU/SRC Selectable Differential Clock Pair
• One 96 MHz Differential Dot Clock Support
• Two 48 MHz Clocks
• Four 33 MHz PCI Clocks
• Two 33 MHz PCI Free Running Clocks
• Low Voltage Frequency Select Input
• I²C Support Byte/Word/Block Read/Write Capabilities
• Ideal Lexmark Spread Spectrum Profile for Maximum
EMI Reduction
• 3.3V Power Supply
• 48-pin SSOP Package
CPU SRC
PCI
x2 / x3 x4 / x5 x 6
DOT
x1
USB
x2
REF
x2
Block Diagram
XIN
XOUT
FS_[C:A]
VTT_PWRGD#
IREF
XTAL
OSC
PLL Ref Freq
PLL1
Divider
Network
PD
PLL2
SDATA
SCLK
I²C
Logic
Pin Configuration
VDD_REF
REF
SCLK 1
VDD_CPU
CPUT[0:1], CPUC[0:1],
CPU2/SRC4
VDD_SRC
SRCT[0:3], SRCC[0:3]
SDATA 2
XOUT 3
XIN 4
VSS_REF 5
REF1/FS_A 6
REF0/FS_C 7
VDD_PCI
PCI[0:3]
VDD_PCIF
PCIF[0:1]
VDD_REF 8
PCI0 ₉
PCI1 10
VDD_PCI 11
VSS_PCI 12
VDD_48MHz
DOT96T
DOT96C
PCI2 13
PCI3 14
VSS_PCI 15
48MHz0
48MHz1
VDD_PCI 16
PCIF0/TESTSEL 17
PCIF1/ITPEN ₁₈
VDD_48 19
48MHz0/FS_B 20
48MHz1 21
VSS_48 22
DOT96T ₂₃
DOT96C ₂₄
48 _{VSS_CPU}
47 CPUT0
46 CPUC0
45 VDD_CPU
44 CPUT1
43 CPUC1
42 IREF
41 VSSA
40 VDDA
39 CPUT2_ITP/SRCT4
38 CPUC2_ITP/SRCC4
37 VDD_SRC
36 _{VSS_SRC}
35 SRCT3
34 SRCC3
33 VDD_SRC
32 SRCC2_SATA
31 SRCT2_SATA
30 SRCC1
29 SRCT1
28 VSS_SRC
27 SRCC0
26 SRCT0
25 VTT_PWRGD#/PD
48-PIN SSOP
Rev 1.0, November 22, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:[phone] Fax:[phone]
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