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CY28405 Datasheet, PDF (1/18 Pages) Cypress Semiconductor – CK409-Compliant Clock Synthesizer
CY28405
CK409-Compliant Clock Synthesizer
Features
• Supports Intel£ Springdale/Prescott (CK409)
• Selectable CPU frequencies
• 3.3V power supply
• Nine copies of PCI clock
• Four copies 3V66 clock with one optional VCH
• Two copies 48 MHz USB clock
• Two copies REF clock
• Three differential CPU clock pairs
• Dial-A-Frequency®
• Supports SMBus/I2C Byte, Word, and Block Read/Write
• Ideal Lexmark Spread Spectrum profile for maximum
electromagnetic interference (EMI) reduction
• 48-pin SSOP package
CPU
3V66
PCI
REF
48M
x3
x4
x9
x2
x2
Block Diagram
XIN
XOUT
FS_[A:E]
VTT_PWRGD#
IREF
XTAL
OSC
PLL Ref Freq
PLL 1
Divider
Network
SELVCH
PLL2
2
MODE
PD#
SDATA
SCLK
I2C
Logic
WD
Timer
Pin Configuration
**FS_A/REF_0
**FS_B/REF_1
VDD_REF
VDD_REF
REF[0:1]
XIN
XOUT
VDD_CPU
VSS_REF
CPUT[0:1,ITP], CPUC[0*:F1,SIT_PC] /PCIF0
*FS_D/PCIF1
*FS_E/PCIF2
VDD_PCI
VSS_PCI
PCI0
VDD_3V66
PCI1
3V66_[0:2]
PCI2
PCI3
VDD_PCI
PCIF[0:2]
VDD_PCI
VSS_PCI
PCI[0:5]
PCI4
PCI5
RESET#/PD#
3V66_3/VCH
DOT_48
USB_48
VDD_48MHz
DOT_48
VSS_48
VDD_48
USB_48
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
SSOP-48
VDDA
VSSA
IREF
CPUT_ITP
CPUC_ITP
VSS_CPU
CPUT1
CPUC1
VDD_CPU
CPUT0
CPUC0
VSS
DNC***
DNC***
VDD
VTT_PWRGD#
SDATA
SCLK
3V66_0
3V66_1
VSS_3V66
VDD_3V66
3V66_2/MODE*
3V66_3/VCH/SELVCH**
RESET#
* 150k Internal Pull-up
** 150k Internal Pull-down
*** Do Not Connect
Rev 1.0, November 20, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:(408) 855-0555 Fax:(408) 855-0550
Page 1 of 18
www.SpectraLinear.com