CY28405-3 Datasheet, PDF (1/16 Pages) SpectraLinear Inc – Clock Synthesizer with Differential SRC and CPU Outputs

CY28405-3
Clock Synthesizer with Differential SRC and CPU Outputs
Features
• Supports Intel^£ Pentium^® 4-type CPUs
• Selectable CPU frequencies
• 3.3V power supply
• Nine copies of PCI clocks
• Four copies of 3V66 with one optional VCH
• Two copies 48 MHz clock
• Two copies of REF
• Three differential CPU clock pairs
• One differential SRC clock
• Support SMBus/I²C Byte, Word and Block Read/ Write
• Ideal Lexmark Spread Spectrum profile for maximum
electromagnetic interference (EMI) reduction
• 48-pin SSOP package
CPU SRC 3V66 PCI REF 48M
x3
x1
x4
x9
x2
x2
Block Diagram
Pin Configuration^[1]
XIN
XOUT
FS_(A:B)
VTT_PWRGD#
IREF
XTAL
OSC
PLL Ref Freq
PLL 1
Divider
Network
PLL2
2
PD#
SDATA
SCLK
I²C
Logic
VDD_REF
REF(0:1)
VDD_CPU
CPUT(0:1, ITP), CPUC(0:1, ITP)
VDD_SRCT
SRCT, SRCC
VDD_3V66
3V66_(0:2)
VDD_PCI
PCIF(0:2)
PCI(0:5)
3V66_3/VCH
VDD_48MHz
DOT_48
USB_48
*FS_A/REF_0
*FS_B/REF_1
VDD_REF
XIN
XOUT
VSS_REF
PCIF0
PCIF1
PCIF2
VDD_PCI
VSS_PCI
PCI0
PCI1
PCI2
PCI3
VDD_PCI
VSS_PCI
PCI4
PCI5
PD#
DOT_48
USB_48
VSS_48
VDD_48
Note:
1. Signals marked with [*] and [**] have internal pull-up and pull-down resistors, respectively.
1
48
2
47
3
46
4
45
5
44
6
43
7
42
8
41
9
40
10
39
11
38
12
37
13
36
14
35
15
34
16
33
17
32
18
31
19
30
20
29
21
28
22
27
23
26
24
25
SSOP-48
* 100k Internal Pull-up
VDDA
VSSA
IREF
CPUT_ITP
CPUC_ITP
VSS_CPU
CPUT1
CPUC1
VDD_CPU
CPUT0
CPUC0
VSS_SRC
SRCT
SRCC
VDD_SRC
VTT_PWRGD#
SDATA*
SCLK*
3V66_0
3V66_1
VSS_3V66
VDD_3V66
3V66_2
3V66_3/VCH
Rev 1.0, November 22, 2006
2200 Laurelwood Road, Santa Clara, CA 95054
Tel:[phone] Fax:[phone]
Page 1 of 16
www.SpectraLinear.com