 English |
|
|
|
|
|
|
|
| S29WSXXXN Datasheet, PDF (75/95 Pages) SPANSION – 256/128/64 Megabit (16/8/4 M x 16-Bit) CMOS 1.8 Volt-only Simultaneous Read/Write, Burst Mode Flash Memory | |||
| |||
| ◁ |
Preliminary
Program Command Sequence (last two cycles)
Read Status Data
VIH
CLK
VIL
AVD
Addresses
tAVDP
tAS
tAH
tAVSW
tAVHW
555h
Data
tCAS
CE#
A0h
tDS
tDH
PA
PD
VA
VA
In
Progress
Complete
OE#
tCH
tWP
WE#
tCS
tWPH
tWC
tWHWH1
tVCS
VCC
Notes:
1. PA = Program Address, PD = Program Data, VA = Valid Address for reading status bits.
2. âIn progressâ and âcompleteâ refer to status of program operation.
3. A23âA14 for the WS256N (A22âA14 for the WS128N, A21âA14 for the WS064N) are donât care during
command sequence unlock cycles.
4. CLK can be either VIL or VIH.
5. The Asynchronous programming operation is independent of the Set Device Read Mode bit in the
Configuration Register.
Figure 11.13. Asynchronous Program Operation Timings: WE# Latched Addresses
October 29, 2004 S29WSxxxN_00_F0
75
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese