 English |
|
|
|
|
|
|
|
| AM50DL128CG Datasheet, PDF (56/63 Pages) SPANSION – Stacked Multi-Chip Package (MCP) Flash Memory and SRAM | |||
| |||
| ◁ |
PRELIMINARY
pSRAM AC CHARACTERISTICS
tWC
Addresses
A20 to A0
tAS
WE#
tWP
tWR
CE#1
CE2
LB#, UB#
DOUT
DQ15 to DQ0
DIN
DQ15 to DQ0
tCW
tCH
tBW
High-Z
(Note 1)
tBE
tODW
tCOE
tDS
tDH
Valid Data In
High-Z
(Note 1)
Notes:
1. If the device is using the I/Os to output data, input signals of reverse polarity must not be applied.
2. If OE# is high during the write cycle, the outputs will remain at high impedance.
Figure 30. Pseudo SRAM Write CycleâCE1#s Control
November 7, 2002
Am50DL128CG
55
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese