 English |
|
|
|
|
|
|
|
| AM29PDLI27H Datasheet, PDF (54/68 Pages) SPANSION – 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control | |||
| |||
| ◁ |
ADVANCE INFORMATION
AC CHARACTERISTICS
Erase and Program Operations
Parameter
JEDEC
Std Description
tAVAV
tAVWL
tWLAX
tWC Write Cycle Time (Note 1)
tAS Address Setup Time
tASO Address Setup Time to OE# low during toggle bit polling
tAH Address Hold Time
tAHT
Address Hold Time From CE# or OE# high
during toggle bit polling
tDVWH
tWHDX
tGHWL
tDS
tDH
tOEPH
tGHWL
Data Setup Time
Data Hold Time
Output Enable High during toggle bit polling
Read Recovery Time Before Write
(OE# High to WE# Low)
tELWL
tCS CE# Setup Time
tWHEH
tCH CE# Hold Time
tWLWH
tWP Write Pulse Width
tWHDL
tWPH Write Pulse Width High
tSR/W Latency Between Read and Write Operations
tWHWH1
tWHWH1 Programming Operation (Note 2)
tWHWH1
tWHWH1 Accelerated Programming Operation (Note 2)
tWHWH2
tWHWH2 Sector Erase Operation (Note 2)
tVCS VCC Setup Time (Note 1)
tRB Write Recovery Time from RY/BY#
tBUSY Program/Erase Valid to RY/BY# Delay
Notes:
1. Not 100% tested.
2. See the âErase And Programming Performanceâ section for more information.
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Min
Typ
Typ
Typ
Min
Min
Max
Speed Options
53 63, 68 83, 88 Unit
55
65
85
ns
0
ns
15
ns
30
35
ns
0
ns
25
30
ns
0
ns
10
ns
0
ns
0
ns
0
ns
35
40
ns
20
25
ns
0
ns
6
µs
4
µs
0.5
sec
50
µs
0
ns
90
ns
52
Am29PDL127H
June 30, 2003
|
▷ |
German
Russian
Spanish
Italian
Polish
Chinese
Japanese
Korean
French
Portuguese