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| AM29PDLI27H Datasheet, PDF (33/68 Pages) SPANSION – 128 Megabit (8 M x 16-Bit) CMOS 3.0 Volt-only, Page Mode Simultaneous Read/Write Flash Memory with Enhanced VersatileIO Control | |||
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Addresses
10h
11h
12h
13h
14h
15h
16h
17h
18h
19h
1Ah
Addresses
1Bh
1Ch
1Dh
1Eh
1Fh
20h
21h
22h
23h
24h
25h
26h
ADVANCE INFORMATION
Data
0051h
0052h
0059h
0002h
0000h
0040h
0000h
0000h
0000h
0000h
0000h
Data
0027h
0036h
0000h
0000h
0004h
0000h
0009h
0000h
0005h
0000h
0004h
0000h
Table 9. CFI Query Identification String
Description
Query Unique ASCII string âQRYâ
Primary OEM Command Set
Address for Primary Extended Table
Alternate OEM Command Set (00h = none exists)
Address for Alternate OEM Extended Table (00h = none exists)
Table 10. System Interface String
Description
VCC Min. (write/erase)
D7âD4: volt, D3âD0: 100 millivolt
VCC Max. (write/erase)
D7âD4: volt, D3âD0: 100 millivolt
VPP Min. voltage (00h = no VPP pin present)
VPP Max. voltage (00h = no VPP pin present)
Typical timeout per single byte/word write 2N µs
Typical timeout for Min. size buffer write 2N µs (00h = not supported)
Typical timeout per individual block erase 2N ms
Typical timeout for full chip erase 2N ms (00h = not supported)
Max. timeout for byte/word write 2N times typical
Max. timeout for buffer write 2N times typical
Max. timeout per individual block erase 2N times typical
Max. timeout for full chip erase 2N times typical (00h = not supported)
June 30, 2003
Am29PDL127H
31
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