S25FL512S Datasheet, PDF(136/143 Page) SPANSION – MirrorBit® Flash Non-Volatile Memory CMOS 3.0 Volt Core with Versatile I/O Serial Peripheral Interface with Multi-I/O

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

S25FL512S Datasheet, PDF (136/143 Pages) SPANSION – MirrorBit® Flash Non-Volatile Memory CMOS 3.0 Volt Core with Versatile I/O Serial Peripheral Interface with Multi-I/O

◁

Data Sheet (Preliminary)

Table 11.19 CFI Alternate Vendor-Specific Extended Query Parameter F0h RFU

Parameter Relative

Byte Address

Offset

00h

01h

02h

...

10h

Data

F0h

0Fh

FFh

Description

Parameter ID (RFU)

Parameter Length (The number of following bytes in this parameter. Adding this value to the

current location value +1 = the first byte of the next parameter)

RFU

This parameter type (Parameter ID F0h) may appear multiple times and have a different length each time.

The parameter is used to reserve space in the ID-CFI map or to force space (pad) to align a following

parameter to a required boundary.

11.4

Registers

The register maps are copied in this section as a quick reference. See Registers on page 56 for the full

description of the register contents.

Table 11.20 Status Register-1 (SR1)

Bits

Field

Name

Function

Type

Default State

Description

SRWD

Status Register

Write Disable

Non-Volatile

1 = Locks state of SRWD, BP, and configuration register

bits when WP# is low by ignoring WRR command

0 = No protection, even when WP# is low

P_ERR

Programming

Error Occurred

Volatile, Read only

1 = Error occurred

0 = No Error

E_ERR

Erase Error

Occurred

Volatile, Read only

1= Error occurred

0 = No Error

BP2

1 if CR1[3]=1,

BP1

BP0

Block

Protection

Volatile if CR1[3]=1,

Non-Volatile if

CR1[3]=0

0 when

shipped from

Spansion

Protects selected range of sectors (Block) from Program

or Erase

WEL

Write Enable

Latch

Volatile

1 = Device accepts Write Registers (WRR), program or

erase commands

0 = Device ignores Write Registers (WRR), program or

erase commands

This bit is not affected by WRR, only WREN and WRDI

commands affect this bit.

WIP

Write in

Progress

Volatile, Read only

1= Device Busy, a Write Registers (WRR), program,

erase or other operation is in progress

0 = Ready Device is in standby mode and can accept

commands

136

S25FL512S

S25FL512S_00_02 March 2, 2012

▷