CXK5T81000ATM Datasheet, PDF (9/11 Pages) Sony Corporation – 131072-word x 8-bit High Speed CMOS Static RAM

Data retention waveform
• Low supply voltage data retention waveform (1) (CE1 contol)
tCDRS
Data retention mode
tR
VCC
3.0V
2.2V
VDR
CE1
GND
CE1 ≥ VCC – 0.2V
• Low supply voltage data retention waveform (2) (CE2 contol)
VCC
3.0V
CE2
VDR
Data retention mode
tCDRS
tR
0.4V
GND
CE2 ≤ 0.2V
CXK5T81000ATM/AYM/AM
Data Retention Characteristics
Item
Symbol
Test conditions
Min.
Data retention voltage
VDR
∗1
2.0
Data retention current
ICCDR1 VCC = 3.0V^∗1
ICCDR2 VCC = 2.0 to 3.6V^∗1
–25 to +85°C —
–25 to +70°C —
+25°C
—
—
Data retention setup time tCDRS Chip disable to data retention mode
0
Recovery time
tR
5
∗1 _{CE1 ≥ Vcc –0.2V, CE2 ≥ Vcc –0.2V (CE1 control) or CE2 ≤ 0.2V (CE2 control)}
∗2 _{VCC = 3.3V, Ta = 25°C}
(Ta = –25 to +85°C)
Typ. Max. Unit
—
3.6 V
—
24
—
12 µA
0.4
—
0.48^∗2 28 µA
—
— ns
—
— ns
–9–