ICX419ALL Datasheet, PDF (6/21 Pages) Sony Corporation – Diagonal 8mm (Type 1/2) CCD Image Sensor for CCIR B/W Video Cameras

ICX419ALL
Clock Voltage Conditions
Item
Symbol
Min.
Typ.
Max.
Unit
Waveform
diagram
Remarks
Readout clock voltage VVT
14.55 15.0 15.45 V
1
VVH1, VVH2
–0.05 0 0.05 V
2
VVH = (VVH1 + VVH2)/2
VVH3, VVH4
–0.2 0 0.05 V
2
VVL1, VVL2,
VVL3, VVL4
–9.6 –9.0 –8.5 V
2
VVL = (VVL3 + VVL4)/2
VφV
8.3 9.0 9.65 Vp-p
2
VφV = VVHn – VVLn (n = 1 to 4)
Vertical transfer clock
voltage
| VVH1 – VVH2 |
VVH3 – VVH –0.25
0.1 V
2
0.1 V
2
VVH4 – VVH –0.25
0.1 V
2
VVHH
0.5 V
2
High-level coupling
VVHL
0.5 V
2
High-level coupling
VVLH
0.5 V
2
Low-level coupling
VVLL
0.5 V
2
Low-level coupling
Horizontal transfer
clock voltage
Reset gate clock
voltage^∗1
VφH
4.75 5.0 5.25 Vp-p
3
VHL
–0.05 0 0.05 V
3
VRGL
∗1
V
4
VφRG
4.5 5.0 5.5 Vp-p
4
VRGLH – VRGLL
0.8 V
4
Low-level coupling
Substrate clock voltage VφSUB
23.0 24.0 25.0 Vp-p
5
∗1 _{Input the reset gate clock without applying a DC bias. In addition, the reset gate clock can also be driven}
with the following specifications.
Item
Reset gate clock
voltage
Symbol
VRGL
VφRG
Min.
Typ.
Max. Unit
Waveform
diagram
–0.2 0 0.2 V
4
8.5 9.0 9.5 Vp-p
4
Remarks
–6–