CXD3027R Datasheet, PDF (12/191 Pages) Sony Corporation – CD Digital Signal Processor with Built-in Digital Servo + Shock-Proof Memory Controller + Digital High & Bass Boost

(3) SCLK pin
XLAT
tDLS
tSPW
SCLK
Serial Read Out Data
(SENS)
...
1/fSCLK
MSB
...
Item
SCLK frequency
SCLK pulse width
Delay time
Symbol
fSCLK
tSPW
tDLS
Min.
31.3
15
Typ.
Max.
16
Unit
MHz
ns
µs
CXD3027R
LSB
(4) COUT, MIRR and DFCT pins
Operating frequency (VDD = AVDD = 3.3 ± 0.3V, VSS = AVSS = 0V, Topr = –20 to +75°C)
Signal
Symbol Min.
Typ.
Max. Unit Conditions
COUT maximum
operating frequency
fCOUT
40
kHz
∗1
MIRR maximum
operating frequency
fMIRR
40
kHz
∗2
DFCT maximum
operating frequency
fDFCTH
5
kHz
∗3
∗1 _{When using a high-speed traverse TZC.}
∗2
B
A
When the RF signal continuously satisfies the following conditions during the above traverse.
• A = 0.11VDD to 0.23VDD
•
B
A+B
≤ 25%
∗3 _{During complete RF signal omission.}
When settings related to DFCT signal generation are Typ.
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