CXD2510Q Datasheet, PDF (1/48 Pages) Sony Corporation – CD Digital Signal Processor

CD Digital Signal Processor
CXD2510Q
Description
The CXD2510Q is a digital signal processor LSI for
CD players and is equipped with the following functions.
• Wide frame jitter margin (±28 frames) due to a built-
in 32K RAM
• Bit clock, which strobes the EFM signal, is
generated by the digital PLL
• EFM data demodulation
• Enhanced EFM frame sync signal protection
• Refined super strategy-based powerful error correction
C1: double correction, C2: quadruple correction
• Quadruple-speed, double-speed and variable pitch
playback
• Noise reduction during track jumps
• Auto zero-cross mute
• Subcode demodulation and Sub Q data error
correction
• Digital spindle servo (built-in oversampling filter)
• 16-bit traverse counter
• Asymmetry compensation circuit
• Serial bus-based CPU interface
• Error correction monitor signals are output from a
new CPU interface.
• Servo auto sequencer
• Fine search which performs high-precision track
jumps
• Digital audio interface output
• Digital level meter, peak meter
• Bilingual compatible
Features
• All digital signals processed with a single chip
during playback
• High-integrated mounting possible due to a built-in
RAM
Structure
Silicon gate CMOS IC
Absolute Maximum Ratings
• Supply voltage
VDD
–0.3 to +7.0 V
• Input voltage
VI
–0.3 to +7.0 V
(VSS – 0.3V to VDD + 0.3V)
• Output voltage
VO
–0.3 to +7.0 V
• Storage temperature Tstg
–40 to +125 °C
• Supply voltage difference
Vss – AVss –0.3 to +0.3 V
VDD – AVDD –0.3 to +0.3 V
80 pin QFP (Plastic)
-L01
-L051
Recommended Operating Conditions
• Supply voltage
VDD^∗ 4.50 to 5.50 V
• Operating temperature Topr –20 to +75 °C
∗ _{The VDD (min.) for the CXD2510Q varies according}
to the playback speed and built-in VCO selection.
The VDD (min.) is 4.50 V when high speed VCO
and quadruple-speed playback are selected
(variable pitch off). The VDD (min.) for the
CXD2510Q under various conditions are as shown
in the following table.
Playback
VDD (min.) [V]
speed _{VCO high-speed VCO normal-speed}
×4
4.50
—
× 2^∗1
4.00
—
×2
3.40
4.00
×1
3.40
3.40
× 1^∗2
3.40
3.40
Dashes indicate that there is no assurance of the
processor operating. All values are for variable pitch off.
∗1 _{When the internal operation of the LSI is set to}
normal-speed playback and the operating clock
of the signal processor is doubled, double-speed
playback results.
∗2 _{When the internal operation of the LSI is set to}
double-speed mode and the crystal oscillating
frequency is halved in low power consumption
mode, normal-speed playback results.
Input/output Capacitances
• Input capacitance CI
• Output capacitance CO
Note) Measurement conditions
12 (max.)
pF
12 (max.)
pF
for high impedance
VDD = VI = 0V
fM = 1MHz
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
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E94412A11