IRCC2.0 Datasheet, PDF (47/87 Pages) SMSC Corporation – Infrared Communications Controller

FIFO
MODE
ONLY
BIT 3
0
0
0
1
0
0
Table 31 - Interrupt Control Table
INTERRUPT
IDENTIFICATION
REGISTER
INTERRUPT SET AND RESET FUNCTIONS
BIT BIT BIT
2
1
0
PRIORITY
LEVEL
INTERRUPT
TYPE
INTERRUPT
SOURCE
INTERRUPT
RESET
CONTROL
0
0
1
-
None
None
-
1
1
0 Highest
Receiver Line
Overrun Error, Reading the
Status
Parity Error,
Line Status
Framing Error Register
or Break
Interrupt
1
0
0 Second
Received Data Receiver Data Read
Available
Available
Receiver
Buffer or the
FIFO drops
below the
trigger level
1
0
0 Second
Character
Timeout
Indication
No Characters
Have Been
Removed From
or Input to the
RCVR FIFO
during the last 4
Char times and
there is at least
1 char in it
during this time
Reading the
Receiver
Buffer
Register
0
1
0 Third
Transmitter
Holding Register
Empty
Transmitter
Holding
Register Empty
Reading the
IIR Register (if
Source of
Interrupt) or
Writing the
Transmitter
Holding
Register
0
0
0 Fourth
MODEM Status
Clear to Send or Reading the
Data Set Ready MODEM
or Ring
Status
Indicator or
Register
Data Carrier
Detect
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