USB97C201_03 Datasheet, PDF (37/59 Pages) SMSC Corporation – USB 2.0 ATA/ ATAPI Controller

NAK
(0xD7 - RESET=0x00)
BIT
NAME
R/W
5
NAK2TX
R
4
NAK2RX
R
3
NAK1TX
R
2
NAK1RX
R
1
NAK0TX
R
0
NAK0RX
R
NAK REGISTER
DESCRIPTION
Endpoint 0 in response to an OUT token.
1 = indicates that an NAK has been sent to the host on
Endpoint 2 in response to an IN token.
1 = indicates that an NAK has been sent to the host on
Endpoint 2 in response to an OUT token.
1 = indicates that an NAK has been sent to the host on
Endpoint 1 in response to an IN token.
1 = indicates that an NAK has been sent to the host on
Endpoint 1 in response to an OUT token.
1 = indicates that an NAK has been sent to the host on
Endpoint 0 in response to an IN token.
1 = indicates that an NAK has been sent to the host on
Endpoint 0 in response to an OUT token.
Notes:
Any bit that is high in this register, if not masked by the corresponding mask bit in the NAK_MSK register will
generate INT5 to the 8051.
A bit in this register may be cleared by writing a “1” to it.
Table 49 – NAK Mask Register
NAK_MSK
(0xD9- RESET=0xFF)
NAK MASK REGISTER
BIT
NAME
R/W
DESCRIPTION
7
NYET2RX
R/W
1 = Prevents generation of the 8051 INT5 interrupt when the
NYET2RX bit is set in the NAK register.
6
NYET0RX
R/w
1 = Prevents generation of the 8051 INT5 interrupt when the
NYET0RX bit is set in the NAK register.
5
NAK2TX
R/W
1 = Prevents generation of the 8051 INT5 interrupt when the
NAK2TX bit is set in the NAK register.
4
NAK2RX
R/W
1 = Prevents generation of the 8051 INT5 interrupt when the
NAK2RX bit is set in the NAK register.
3
NAK1TX
R/W
1 = Prevents generation of the 8051 INT5 interrupt when the
NAK1TX bit is set in the NAK register.
2
NAK1RX
R/W
1 = Prevents generation of the 8051 INT5 interrupt when the
NAK1RX bit is set in the NAK register.
1
NAK0TX
R/W
1 = Prevents generation of the 8051 INT5 interrupt when the
NAK0TX bit is set in the NAK register.
0
NAK0RX
R/W
1 = Prevents generation of the 8051 INT5 interrupt when the
NAK0RX bit is set in the NAK register.
Table 50 – USB Error Register
USB_ERR
(0xDA - RESET=0x00)
USB ERROR REGISTER
BIT
NAME
R/W
DESCRIPTION
7
Reserved
R
This bit always reads a “0”.
6
TOKEN
R/W
When set, this bit indicates that an unexpected token has
been received on one of the device’s endpoints.
5
Reserved
R
This bit always reads a “0”.
4
STALL
R/W
When set, indicates that a token has been received on a
endpoint of the device while that endpoint is in the STALL
condition.
3
DTOG
R/W
When set, indicates that a data packet has been received on
one of the device’s endpoints that has an incorrect data
toggle.
SMSC USB97C201
Page 37
DATASHEET
Rev. 11-05-03