USB97C201_03 Datasheet, PDF (16/59 Pages) SMSC Corporation – USB 2.0 ATA/ ATAPI Controller

6.1.3 MCU BLOCK REGISTER SUMMARY
ADDRESS
80
93
90
94
95
96
97
9A
9B
C0
9C
9D
Table 4 - MCU Block Register Summary
(These registers are external to the 8051 design core)
NAME
ISR_0
IMR_0
ISR_1
IMR_1
DEV_REV
DEV_ID
GPIO_DIR
GPIO_OUT
GPIO_IN
GPIO_IRQ
GPIO_MSK
UTIL_CONFIG
R/W
DESCRIPTION
RUNTIME REGISTERS
R/W INT0 Source Register
R/W INT0 Mask Register
R/W INT1 Source Register
R/W INT1 Mask Register
R Device Revision Register
R Device ID Register
UTILITY REGISTERS
R/W GPIO Direction Register
R/W GPIO Data Output Register
R GPIO Data Input Register
R/W GPIO Interrupt Status Register (INT4)
R/W GPIO Interrupt Mask Register (INT4)
R/W Miscellaneous Configuration Register
9F
SRAM_DATA R/W ^{SRAM Data Port Register}
A1
SRAM_ADD1 R/W SRAM Address 1 Register
A2
SRAM_ADD2 R/W SRAM Address 2 Register
POWER MANAGEMENT REGISTERS
A5
CLOCK_SEL
R/W 8051 Clock Select Register
A0
WU_SRC_1
R/W Wakeup Source 1 Register (INT2)
A6
WU_MSK_1
R/W Wakeup Mask 1 Register (INT2)
PAGE
19
20
20
21
21
21
22
24
24
24
25
26
26
27
27
27
28
28
SMSC USB97C201
Page 16
DATASHEET
Rev. 11-05-03