LPC47S45X_07 Datasheet, PDF (236/259 Pages) SMSC Corporation – Advanced I/O with X-Bus Interface

nWRITE
PD<7:0>
DATASTB
ADDRSTB
nWAIT
t1
t3
t4
t7
t8
t9
t2
t5
t6
t10
t11
t12
FIGURE 27 − EPP 1.9 DATA OR ADDRESS READ CYCLE
NAME
DESCRIPTION
MIN TYP MAX
T1 nWAIT Asserted to nWRITE Deasserted
0
185
T2 nWAIT Deasserted to nWRITE Modified (Notes 1,2)
60
190
T3 nWAIT Asserted to PDATA Hi-Z (Note 1)
60
180
T4 Command Asserted to PDATA Valid
0
T5 Command Deasserted to PDATA Hi-Z
0
T6 nWAIT Deasserted to PDATA Driven (Note 1)
60
190
T7 PDIR Set to Command
0
20
T8 PDATA Hi-Z to Command Asserted
0
30
T9 nWRITE Deasserted to Command
1
T10 nWAIT Asserted to Command Asserted
0
195
t11 nWAIT Deasserted to Command Deasserted
60
180
(Note 1)
t12 PDATA Valid to nWAIT Deasserted
0
t13 PDATA Hi-Z to nWAIT Deasserted
0
Note 1: nWAIT is considered to have settled after it does not transition for a minimum of 50 ns.
Note 2: When not executing a write cycle, EPP nWRITE is inactive high.
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
s
SMSC LPC47S45x
Page 236 of 259
DATASHEET
Rev. 04-30-07