FDC37B72X_07 Datasheet, PDF (216/238 Pages) SMSC Corporation – 128 Pin Enhanced Super I/O Controller with ACPI Support

NAME
t1
t2
t3
t4
t5
t6
t7
t8
t9
t10
t11
t12
t13
t14
t15
t16
TABLE 88 - BURST TRANSFER DMA TIMING
DESCRIPTION
MIN
TYP
nDACK Delay Time from FDRQ High
0
DRQ Reset Delay from nIOR or nIOW
FDRQ Reset Delay from nDACK Low
nDACK Width
150
nIOR Delay from FDRQ High
0
nIOW Delay from FDRQ High
0
Data Access Time from nIOR Low
Data Set Up Time to nIOW High
40
Data to Float Delay from nIOR High
10
Data Hold Time from nIOW High
10
nDACK Set Up to nIOW/nIOR Low
5
nDACK Hold after nIOW/nIOR High
10
TC Pulse Width
60
AEN Set Up to nIOR/nIOW
40
AEN Hold from nDACK
10
TC Active to PDRQ Inactive
MAX
100
100
100
60
100
UNITS
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
217